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D55106.id171557.diff
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D55106.id171557.diff

diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -2514,7 +2514,7 @@
return (a - b);
}
-bool
+void
get_kernel_reg_iss(u_int iss, uint64_t *val)
{
int i;
@@ -2522,7 +2522,7 @@
for (i = 0; i < nitems(user_regs); i++) {
if (user_regs[i].iss == iss) {
*val = CPU_DESC_FIELD(kern_cpu_desc, i);
- return (true);
+ return;
}
}
@@ -2533,7 +2533,7 @@
* Fetch the specified register's value, ensuring that individual field values
* do not exceed those in the mask.
*/
-bool
+void
get_kernel_reg_iss_masked(u_int iss, uint64_t *valp, uint64_t mask)
{
const struct mrs_field *fields;
@@ -2549,7 +2549,7 @@
fields[j].shift, fields[j].sign);
}
*valp = mask;
- return (true);
+ return;
}
}
diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h
--- a/sys/arm64/include/cpu.h
+++ b/sys/arm64/include/cpu.h
@@ -282,10 +282,10 @@
void update_special_reg_iss(u_int, uint64_t, uint64_t);
#define update_special_reg(reg, clear, set) \
update_special_reg_iss(reg ## _ISS, clear, set)
-bool get_kernel_reg_iss(u_int, uint64_t *);
+void get_kernel_reg_iss(u_int, uint64_t *);
#define get_kernel_reg(reg, valp) \
get_kernel_reg_iss(reg ## _ISS, valp)
-bool get_kernel_reg_iss_masked(u_int, uint64_t *, uint64_t);
+void get_kernel_reg_iss_masked(u_int, uint64_t *, uint64_t);
#define get_kernel_reg_masked(reg, valp, mask) \
get_kernel_reg_iss_masked(reg ## _ISS, valp, mask)
bool get_user_reg_iss(u_int, uint64_t *, bool);

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