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D55958.diff
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diff --git a/lib/libsysdecode/mktables b/lib/libsysdecode/mktables
--- a/lib/libsysdecode/mktables
+++ b/lib/libsysdecode/mktables
@@ -165,6 +165,13 @@
gen_table "cmsgtypesocket" "SCM_[A-Z_]+[[:space:]]+0x[0-9]+" "sys/socket.h"
if [ -e "${include_dir}/x86/sysarch.h" ]; then
gen_table "sysarchnum" "(AMD64|I386)_[A-Z86_]+[[:space:]]+[0-9]+" "x86/sysarch.h"
+elif [ -e "${include_dir}/arm/sysarch.h" ]; then
+ echo "#ifdef __aarch64__"
+ gen_table "sysarchnum" "ARM64_[A-Z_]+[[:space:]]+0x[0-9]+" "machine/sysarch.h"
+ echo "#endif"
+ echo "#ifdef __arm__"
+ gen_table "sysarchnum" "ARM_[A-Z_]+[[:space:]]+[0-9]+" "arm/sysarch.h"
+ echo "#endif"
else
gen_table "sysarchnum" "[A-Z_]+[[:space:]]+[0-9]+" "machine/sysarch.h"
fi
diff --git a/sys/arm64/arm64/mte.c b/sys/arm64/arm64/mte.c
--- a/sys/arm64/arm64/mte.c
+++ b/sys/arm64/arm64/mte.c
@@ -47,6 +47,9 @@
*/
#define MTE_HAS_TAG_CHECK (mte_version >= 2)
+static u_int __read_mostly mte_flags = 0;
+#define MTE_HAS_ASYNC 1
+
struct thread *mte_switch(struct thread *);
#define load_tags(addr) ({ \
@@ -80,6 +83,57 @@
td->td_md.md_sctlr |= sctlr;
}
+int
+mte_sysarch_ctrl(struct thread *td, uint64_t flags)
+{
+ uint64_t mask, sctlr;
+ bool clear_tfsr;
+
+ if (!MTE_HAS_TAG_CHECK)
+ return (0);
+
+ clear_tfsr = false;
+ switch (flags & MTE_CTRL_TCF_MASK) {
+ case MTE_CTRL_TCF_NONE:
+ sctlr = SCTLR_TCF0_NONE;
+ break;
+ case MTE_CTRL_TCF_SYNC:
+ sctlr = SCTLR_TCF0_SYNC;
+ break;
+ case MTE_CTRL_TCF_ASYNC:
+ if ((mte_flags & MTE_HAS_ASYNC) == 0)
+ return (EINVAL);
+
+ sctlr = SCTLR_TCF0_ASYNC;
+ clear_tfsr = true;
+ break;
+ default:
+ /* TODO: Support FEAT_MTE_ASYM_FAULT */
+ return (EINVAL);
+ }
+
+ if ((flags & MTE_CTRL_ENABLE) != 0)
+ sctlr |= SCTLR_ATA0;
+
+ /* Tag Exclusion Mask */
+ mask = (flags & MTE_CTRL_EXCLUDE_MASK) >> MTE_CTRL_EXCLUDE_SHIFT;
+ td->td_md.md_gcr = mask << GCR_Exclude_SHIFT | GCR_RRND;
+ /* MTE mode */
+ mte_update_sctlr(td, sctlr);
+
+ if (td == curthread) {
+ printf("writing new sctlr val: 0x%lx\n", sctlr);
+ WRITE_SPECIALREG(sctlr_el1,
+ (READ_SPECIALREG(sctlr_el1) & ~SCTLR_USER_MASK) | sctlr);
+ WRITE_SPECIALREG(GCR_EL1_REG, td->td_md.md_gcr);
+ if (clear_tfsr)
+ WRITE_SPECIALREG(TFSRE0_EL1_REG, 0);
+ isb();
+ }
+
+ return (0);
+}
+
/**
* Clear/sync the allocation tags for a given page. This should be done on
* allocation of a page to ensure a tag check fault does not occur immediately
diff --git a/sys/arm64/arm64/sys_machdep.c b/sys/arm64/arm64/sys_machdep.c
--- a/sys/arm64/arm64/sys_machdep.c
+++ b/sys/arm64/arm64/sys_machdep.c
@@ -47,6 +47,7 @@
sysarch(struct thread *td, struct sysarch_args *uap)
{
struct arm64_guard_page_args gp_args;
+ uint64_t flags;
struct pcb *pcb;
vm_offset_t eva;
unsigned long sve_len;
@@ -78,6 +79,14 @@
error = pmap_bti_set(vmspace_pmap(td->td_proc->p_vmspace),
trunc_page(gp_args.addr), round_page(eva));
+
+ break;
+ case ARM64_MTE_CTRL:
+ error = copyin(uap->parms, &flags, sizeof(uint64_t));
+ if (error != 0)
+ return (error);
+
+ error = mte_sysarch_ctrl(td, flags);
break;
case ARM64_GET_SVE_VL:
pcb = td->td_pcb;
diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h
--- a/sys/arm64/include/cpu.h
+++ b/sys/arm64/include/cpu.h
@@ -278,6 +278,10 @@
#endif
/* Memory Tagging Extension (MTE) support */
+#define MTE_SET_TCF_NONE 0
+#define MTE_SET_TCF_SYNC 1
+#define MTE_SET_TCF_ASYNC 2
+
void mte_fork(struct thread *, struct thread *);
void mte_exec(struct thread *);
void mte_copy_thread(struct thread *, struct thread *);
@@ -289,6 +293,8 @@
void mte_load_tags(vm_page_t, const void *);
void mte_copy_tags(vm_page_t, vm_page_t, vm_offset_t, vm_offset_t);
+int mte_sysarch_ctrl(struct thread *, uint64_t);
+
/* Functions to read the sanitised view of the special registers */
void update_special_regs(u_int);
void update_special_reg_iss(u_int, uint64_t, uint64_t);
diff --git a/sys/arm64/include/sysarch.h b/sys/arm64/include/sysarch.h
--- a/sys/arm64/include/sysarch.h
+++ b/sys/arm64/include/sysarch.h
@@ -51,6 +51,23 @@
#define ARM64_GET_SVE_VL 0x200
/* Reserved ARM64_SET_SVE_VL 0x201 */
+/* MTE */
+#define ARM64_MTE_CTRL 0x300 /* MTE Configuration */
+
+/* Enable MTE */
+#define MTE_CTRL_ENABLE 0x1
+
+/* Tag Check Fault control */
+#define MTE_CTRL_TCF_SHIFT 1
+#define MTE_CTRL_TCF_MASK (0x3 << MTE_CTRL_TCF_SHIFT)
+#define MTE_CTRL_TCF_NONE (0x0 << MTE_CTRL_TCF_SHIFT)
+#define MTE_CTRL_TCF_SYNC (0x1 << MTE_CTRL_TCF_SHIFT)
+#define MTE_CTRL_TCF_ASYNC (0x2 << MTE_CTRL_TCF_SHIFT)
+
+/* Tag Exclusion mask */
+#define MTE_CTRL_EXCLUDE_SHIFT 0x3
+#define MTE_CTRL_EXCLUDE_MASK (0xffffUL << MTE_CTRL_EXCLUDE_SHIFT)
+
#ifndef _KERNEL
__BEGIN_DECLS
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D55958: arm64: mte: userspace configuration of MTE via sysarch() system call
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