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Index: head/sys/dev/mlx5/device.h
===================================================================
--- head/sys/dev/mlx5/device.h
+++ head/sys/dev/mlx5/device.h
@@ -1023,6 +1023,25 @@
MLX5_MODIFY_ESW_VPORT_CONTEXT_FIELD_SELECT_CVLAN_INSERT = 1 << 3
};
+enum {
+ MLX5_UC_ADDR_CHANGE = (1 << 0),
+ MLX5_MC_ADDR_CHANGE = (1 << 1),
+ MLX5_VLAN_CHANGE = (1 << 2),
+ MLX5_PROMISC_CHANGE = (1 << 3),
+ MLX5_MTU_CHANGE = (1 << 4),
+};
+
+enum mlx5_list_type {
+ MLX5_NIC_VPORT_LIST_TYPE_UC = 0x0,
+ MLX5_NIC_VPORT_LIST_TYPE_MC = 0x1,
+ MLX5_NIC_VPORT_LIST_TYPE_VLAN = 0x2,
+};
+
+enum {
+ MLX5_ESW_VPORT_ADMIN_STATE_DOWN = 0x0,
+ MLX5_ESW_VPORT_ADMIN_STATE_UP = 0x1,
+ MLX5_ESW_VPORT_ADMIN_STATE_AUTO = 0x2,
+};
/* MLX5 DEV CAPs */
/* TODO: EAT.ME */
@@ -1087,6 +1106,22 @@
MLX5_GET(flow_table_eswitch_cap, \
mdev->hca_caps_max[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)
+#define MLX5_CAP_ESW_FLOWTABLE_EGRESS_ACL(mdev, cap) \
+ MLX5_CAP_ESW_FLOWTABLE(dev, \
+ flow_table_properties_esw_acl_egress.cap)
+
+#define MLX5_CAP_ESW_FLOWTABLE_EGRESS_ACL_MAX(mdev, cap) \
+ MLX5_CAP_ESW_FLOWTABLE_MAX(dev, \
+ flow_table_properties_esw_acl_egress.cap)
+
+#define MLX5_CAP_ESW_FLOWTABLE_INGRESS_ACL(mdev, cap) \
+ MLX5_CAP_ESW_FLOWTABLE(dev, \
+ flow_table_properties_esw_acl_ingress.cap)
+
+#define MLX5_CAP_ESW_FLOWTABLE_INGRESS_ACL_MAX(mdev, cap) \
+ MLX5_CAP_ESW_FLOWTABLE_MAX(dev, \
+ flow_table_properties_esw_acl_ingress.cap)
+
#define MLX5_CAP_ESW(mdev, cap) \
MLX5_GET(e_switch_cap, \
mdev->hca_caps_cur[MLX5_CAP_ESWITCH], cap)
Index: head/sys/dev/mlx5/driver.h
===================================================================
--- head/sys/dev/mlx5/driver.h
+++ head/sys/dev/mlx5/driver.h
@@ -934,7 +934,7 @@
};
-#define MLX5_EEPROM_MAX_BYTES 48
+#define MLX5_EEPROM_MAX_BYTES 32
#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff
#define MLX5_EEPROM_REVISION_ID_BYTE_MASK 0x0000ff00
#define MLX5_EEPROM_PAGE_3_VALID_BIT_MASK 0x00040000
Index: head/sys/dev/mlx5/mlx5_core/mlx5_eq.c
===================================================================
--- head/sys/dev/mlx5/mlx5_core/mlx5_eq.c
+++ head/sys/dev/mlx5/mlx5_core/mlx5_eq.c
@@ -62,7 +62,6 @@
(1ull << MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR) | \
(1ull << MLX5_EVENT_TYPE_WQ_ACCESS_ERROR) | \
(1ull << MLX5_EVENT_TYPE_PORT_CHANGE) | \
- (1ull << MLX5_EVENT_TYPE_NIC_VPORT_CHANGE) | \
(1ull << MLX5_EVENT_TYPE_SRQ_CATAS_ERROR) | \
(1ull << MLX5_EVENT_TYPE_SRQ_LAST_WQE) | \
(1ull << MLX5_EVENT_TYPE_SRQ_RQ_LIMIT))
@@ -473,6 +472,10 @@
async_event_mask |= (1ull <<
MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT);
+ if (MLX5_CAP_GEN(dev, nic_vport_change_event))
+ async_event_mask |= (1ull <<
+ MLX5_EVENT_TYPE_NIC_VPORT_CHANGE);
+
err = mlx5_create_map_eq(dev, &table->cmd_eq, MLX5_EQ_VEC_CMD,
MLX5_NUM_CMD_EQE, 1ull << MLX5_EVENT_TYPE_CMD,
"mlx5_cmd_eq", &dev->priv.uuari.uars[0]);
Index: head/sys/dev/mlx5/mlx5_core/mlx5_vport.c
===================================================================
--- head/sys/dev/mlx5/mlx5_core/mlx5_vport.c
+++ head/sys/dev/mlx5/mlx5_core/mlx5_vport.c
@@ -328,7 +328,8 @@
MLX5_SET(modify_nic_vport_context_in, in,
field_select.addresses_list, 1);
MLX5_SET(modify_nic_vport_context_in, in,
- nic_vport_context.allowed_list_type, 0);
+ nic_vport_context.allowed_list_type,
+ MLX5_NIC_VPORT_LIST_TYPE_UC);
MLX5_SET(modify_nic_vport_context_in, in,
nic_vport_context.allowed_list_size, 1);
@@ -345,6 +346,131 @@
return err;
}
EXPORT_SYMBOL_GPL(mlx5_set_nic_vport_current_mac);
+
+int mlx5_set_nic_vport_vlan_list(struct mlx5_core_dev *dev, u32 vport,
+ u16 *vlan_list, int list_len)
+{
+ void *in, *ctx;
+ int i, err;
+ int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in)
+ + MLX5_ST_SZ_BYTES(vlan_layout) * (int)list_len;
+
+ int max_list_size = 1 << MLX5_CAP_GEN_MAX(dev, log_max_vlan_list);
+
+ if (list_len > max_list_size) {
+ mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
+ list_len, max_list_size);
+ return -ENOSPC;
+ }
+
+ in = mlx5_vzalloc(inlen);
+ if (!in) {
+ mlx5_core_warn(dev, "failed to allocate inbox\n");
+ return -ENOMEM;
+ }
+
+ MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
+ if (vport)
+ MLX5_SET(modify_nic_vport_context_in, in,
+ other_vport, 1);
+ MLX5_SET(modify_nic_vport_context_in, in,
+ field_select.addresses_list, 1);
+
+ ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in, nic_vport_context);
+
+ MLX5_SET(nic_vport_context, ctx, allowed_list_type,
+ MLX5_NIC_VPORT_LIST_TYPE_VLAN);
+ MLX5_SET(nic_vport_context, ctx, allowed_list_size, list_len);
+
+ for (i = 0; i < list_len; i++) {
+ u8 *vlan_lout = MLX5_ADDR_OF(nic_vport_context, ctx,
+ current_uc_mac_address[i]);
+ MLX5_SET(vlan_layout, vlan_lout, vlan, vlan_list[i]);
+ }
+
+ err = mlx5_modify_nic_vport_context(dev, in, inlen);
+
+ kvfree(in);
+ return err;
+}
+EXPORT_SYMBOL_GPL(mlx5_set_nic_vport_vlan_list);
+
+int mlx5_set_nic_vport_mc_list(struct mlx5_core_dev *mdev, int vport,
+ u64 *addr_list, size_t addr_list_len)
+{
+ void *in, *ctx;
+ int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in)
+ + MLX5_ST_SZ_BYTES(mac_address_layout) * (int)addr_list_len;
+ int err;
+ size_t i;
+ int max_list_sz = 1 << MLX5_CAP_GEN_MAX(mdev, log_max_current_mc_list);
+
+ if ((int)addr_list_len > max_list_sz) {
+ mlx5_core_warn(mdev, "Requested list size (%d) > (%d) max_list_size\n",
+ (int)addr_list_len, max_list_sz);
+ return -ENOSPC;
+ }
+
+ in = mlx5_vzalloc(inlen);
+ if (!in) {
+ mlx5_core_warn(mdev, "failed to allocate inbox\n");
+ return -ENOMEM;
+ }
+
+ MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
+ if (vport)
+ MLX5_SET(modify_nic_vport_context_in, in,
+ other_vport, 1);
+ MLX5_SET(modify_nic_vport_context_in, in,
+ field_select.addresses_list, 1);
+
+ ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in, nic_vport_context);
+
+ MLX5_SET(nic_vport_context, ctx, allowed_list_type,
+ MLX5_NIC_VPORT_LIST_TYPE_MC);
+ MLX5_SET(nic_vport_context, ctx, allowed_list_size, addr_list_len);
+
+ for (i = 0; i < addr_list_len; i++) {
+ u8 *mac_lout = (u8 *)MLX5_ADDR_OF(nic_vport_context, ctx,
+ current_uc_mac_address[i]);
+ u8 *mac_ptr = (u8 *)MLX5_ADDR_OF(mac_address_layout, mac_lout,
+ mac_addr_47_32);
+ ether_addr_copy(mac_ptr, (u8 *)&addr_list[i]);
+ }
+
+ err = mlx5_modify_nic_vport_context(mdev, in, inlen);
+
+ kvfree(in);
+
+ return err;
+}
+EXPORT_SYMBOL_GPL(mlx5_set_nic_vport_mc_list);
+
+int mlx5_set_nic_vport_promisc(struct mlx5_core_dev *mdev, int vport,
+ bool promisc_mc, bool promisc_uc,
+ bool promisc_all)
+{
+ u8 in[MLX5_ST_SZ_BYTES(modify_nic_vport_context_in)];
+ u8 *ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
+ nic_vport_context);
+
+ memset(in, 0, MLX5_ST_SZ_BYTES(modify_nic_vport_context_in));
+
+ MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
+ if (vport)
+ MLX5_SET(modify_nic_vport_context_in, in,
+ other_vport, 1);
+ MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
+ if (promisc_mc)
+ MLX5_SET(nic_vport_context, ctx, promisc_mc, 1);
+ if (promisc_uc)
+ MLX5_SET(nic_vport_context, ctx, promisc_uc, 1);
+ if (promisc_all)
+ MLX5_SET(nic_vport_context, ctx, promisc_all, 1);
+
+ return mlx5_modify_nic_vport_context(mdev, in, sizeof(in));
+}
+EXPORT_SYMBOL_GPL(mlx5_set_nic_vport_promisc);
int mlx5_set_nic_vport_permanent_mac(struct mlx5_core_dev *mdev, int vport,
u8 *addr)
{
Index: head/sys/dev/mlx5/vport.h
===================================================================
--- head/sys/dev/mlx5/vport.h
+++ head/sys/dev/mlx5/vport.h
@@ -42,6 +42,13 @@
u32 vport, u8 *addr);
int mlx5_set_nic_vport_current_mac(struct mlx5_core_dev *mdev, int vport,
bool other_vport, u8 *addr);
+int mlx5_set_nic_vport_vlan_list(struct mlx5_core_dev *dev, u32 vport,
+ u16 *vlan_list, int list_len);
+int mlx5_set_nic_vport_mc_list(struct mlx5_core_dev *mdev, int vport,
+ u64 *addr_list, size_t addr_list_len);
+int mlx5_set_nic_vport_promisc(struct mlx5_core_dev *mdev, int vport,
+ bool promisc_mc, bool promisc_uc,
+ bool promisc_all);
int mlx5_set_nic_vport_permanent_mac(struct mlx5_core_dev *mdev, int vport,
u8 *addr);
int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev);
Index: head/sys/modules/mlx5/Makefile
===================================================================
--- head/sys/modules/mlx5/Makefile
+++ head/sys/modules/mlx5/Makefile
@@ -7,6 +7,7 @@
mlx5_cmd.c \
mlx5_cq.c \
mlx5_eq.c \
+mlx5_eswitch_vacl.c \
mlx5_flow_table.c \
mlx5_fw.c \
mlx5_health.c \

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