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Index: sys/arm64/arm64/machdep.c
===================================================================
--- sys/arm64/arm64/machdep.c
+++ sys/arm64/arm64/machdep.c
@@ -321,8 +321,8 @@
fill_dbregs(struct thread *td, struct dbreg *regs)
{
struct debug_monitor_state *monitor;
- int count, i;
- uint8_t debug_ver, nbkpts;
+ int i;
+ uint8_t debug_ver, nbkpts, nwtpts;
memset(regs, 0, sizeof(*regs));
@@ -330,23 +330,30 @@
&debug_ver);
extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
&nbkpts);
+ extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
+ &nwtpts);
/*
* The BRPs field contains the number of breakpoints - 1. Armv8-A
* allows the hardware to provide 2-16 breakpoints so this won't
- * overflow an 8 bit value.
+ * overflow an 8 bit value. The same applies to the WRPs field.
*/
- count = nbkpts + 1;
+ nbkpts++;
+ nwtpts++;
- regs->db_info = debug_ver;
- regs->db_info <<= 8;
- regs->db_info |= count;
+ regs->db_debug_ver = debug_ver;
+ regs->db_nbkpts = nbkpts;
+ regs->db_nwtpts = nwtpts;
monitor = &td->td_pcb->pcb_dbg_regs;
if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
- for (i = 0; i < count; i++) {
- regs->db_regs[i].dbr_addr = monitor->dbg_bvr[i];
- regs->db_regs[i].dbr_ctrl = monitor->dbg_bcr[i];
+ for (i = 0; i < nbkpts; i++) {
+ regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
+ regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
+ }
+ for (i = 0; i < nwtpts; i++) {
+ regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
+ regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
}
}
@@ -365,11 +372,17 @@
monitor->dbg_enable_count = 0;
for (i = 0; i < DBG_BRP_MAX; i++) {
/* TODO: Check these values */
- monitor->dbg_bvr[i] = regs->db_regs[i].dbr_addr;
- monitor->dbg_bcr[i] = regs->db_regs[i].dbr_ctrl;
+ monitor->dbg_bvr[i] = regs->db_breakregs[i].dbr_addr;
+ monitor->dbg_bcr[i] = regs->db_breakregs[i].dbr_ctrl;
if ((monitor->dbg_bcr[i] & 1) != 0)
monitor->dbg_enable_count++;
}
+ for (i = 0; i < DBG_WRP_MAX; i++) {
+ monitor->dbg_wvr[i] = regs->db_watchregs[i].dbw_addr;
+ monitor->dbg_wcr[i] = regs->db_watchregs[i].dbw_ctrl;
+ if ((monitor->dbg_wcr[i] & 1) != 0)
+ monitor->dbg_enable_count++;
+ }
if (monitor->dbg_enable_count > 0)
monitor->dbg_flags |= DBGMON_ENABLED;
Index: sys/arm64/include/reg.h
===================================================================
--- sys/arm64/include/reg.h
+++ sys/arm64/include/reg.h
@@ -60,14 +60,21 @@
};
struct dbreg {
- uint32_t db_info;
- uint32_t db_pad;
+ uint8_t db_debug_ver;
+ uint8_t db_nbkpts;
+ uint8_t db_nwtpts;
+ uint8_t db_pad[5];
struct {
uint64_t dbr_addr;
uint32_t dbr_ctrl;
uint32_t dbr_pad;
- } db_regs[16];
+ } db_breakregs[16];
+ struct {
+ uint64_t dbw_addr;
+ uint32_t dbw_ctrl;
+ uint32_t dbw_pad;
+ } db_watchregs[16];
};
struct dbreg32 {

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