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D55218.diff
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diff --git a/sys/amd64/amd64/efirt_machdep.c b/sys/amd64/amd64/efirt_machdep.c
--- a/sys/amd64/amd64/efirt_machdep.c
+++ b/sys/amd64/amd64/efirt_machdep.c
@@ -348,6 +348,8 @@
*/
if (!pmap_pcid_enabled)
invltlb();
+ if (lass_enabled)
+ load_cr4(rcr4() & ~CR4_LASS);
return (0);
}
@@ -357,6 +359,8 @@
pmap_t curpmap;
uint64_t cr3;
+ if (lass_enabled)
+ load_cr4(rcr4() | CR4_LASS);
curpmap = &curproc->p_vmspace->vm_pmap;
cr3 = curpmap->pm_cr3;
if (pmap_pcid_enabled) {
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c
--- a/sys/amd64/amd64/initcpu.c
+++ b/sys/amd64/amd64/initcpu.c
@@ -290,6 +290,19 @@
if (cpu_stdext_feature2 & CPUID_STDEXT2_PKU)
cr4 |= CR4_PKE;
+ /*
+ * Any CPU having Linear Address Space Separation (LASS)
+ * should have SMAP, but check it to be sure. Otherwise
+ * userspace accesses from kernel cannot work.
+ */
+ if (IS_BSP() && (cpu_stdext_feature4 & CPUID_STDEXT4_LASS) != 0 &&
+ (cpu_stdext_feature & CPUID_STDEXT_SMAP) != 0) {
+ lass_enabled = 1;
+ TUNABLE_INT_FETCH("hw.lass", &lass_enabled);
+ }
+ if (lass_enabled)
+ cr4 |= CR4_LASS;
+
/*
* If SMEP is present, we only need to flush RSB (by default)
* on context switches, to prevent cross-process ret2spec
diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c
--- a/sys/amd64/amd64/machdep.c
+++ b/sys/amd64/amd64/machdep.c
@@ -204,6 +204,7 @@
long Maxmem = 0;
long realmem = 0;
int late_console = 1;
+int lass_enabled = 0;
struct kva_md_info kmi;
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c
--- a/sys/amd64/amd64/pmap.c
+++ b/sys/amd64/amd64/pmap.c
@@ -1737,6 +1737,7 @@
{
void (*la57_tramp)(uint64_t pml5);
pml5_entry_t *pt;
+ uint64_t cr4;
if ((cpu_stdext_feature2 & CPUID_STDEXT2_LA57) == 0)
return;
@@ -1757,8 +1758,16 @@
KERNSTART + amd64_loadaddr());
printf("Calling la57 trampoline at %p, KPML5phys %#lx ...",
la57_tramp, KPML5phys);
+ if (lass_enabled) {
+ cr4 = rcr4();
+ load_cr4(cr4 & ~CR4_LASS);
+ }
la57_tramp(KPML5phys);
printf(" alive in la57 mode\n");
+ if (lass_enabled) {
+ cr4 = rcr4();
+ load_cr4(cr4 | CR4_LASS);
+ }
}
static void
diff --git a/sys/amd64/include/md_var.h b/sys/amd64/include/md_var.h
--- a/sys/amd64/include/md_var.h
+++ b/sys/amd64/include/md_var.h
@@ -45,6 +45,7 @@
extern int hw_ssb_disable;
extern int nmi_flush_l1d_sw;
extern int syscall_ret_l1d_flush_mode;
+extern int lass_enabled;
extern vm_paddr_t intel_graphics_stolen_base;
extern vm_paddr_t intel_graphics_stolen_size;
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