D56265.id175519.diff
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	diff --git a/lib/libifconfig/libifconfig_sfp.h b/lib/libifconfig/libifconfig_sfp.h
	--- a/lib/libifconfig/libifconfig_sfp.h
	+++ b/lib/libifconfig/libifconfig_sfp.h
	@@ -83,11 +83,15 @@
	#define QSFP_DUMP1_SIZE 128 /**< bytes in the second region
	in a QSFP module dump */

	+#define CMIS_DUMP_SIZE 512 /*< CMIS dump buffer size /
	+#define CMIS_DUMP_P11 256 /*< offset of Page 11h in dump buffer /
	+
	/** SFP module I2C memory dump
	- * SFP modules have one region, QSFP modules have two regions.
	+ * SFP modules have one region, QSFP modules have two.
	+ * CMIS modules have three: lower memory, Page 00h, and Page 11h.
	*/
	struct ifconfig_sfp_dump {
	- uint8_t data[SFF_DUMP_SIZE]; /*< memory dump data /
	+ uint8_t data[CMIS_DUMP_SIZE]; /*< memory dump data /
	};

	/** Get information about the static properties of an SFP/QSFP module
	@@ -126,6 +130,25 @@
	}
	}

	+/** Is the given module ID a CMIS-managed module (QSFP-DD, OSFP, etc.)
	+ * @param id The sfp_id field of a SFP module info object
	+ * @return A bool true if CMIS-type sfp_id otherwise false
	+ */
	+static inline bool
	+ifconfig_sfp_id_is_cmis(enum sfp_id id)
	+{
	+ switch (id) {
	+ case SFP_ID_QSFP_DD:
	+ case SFP_ID_QSFP8X:
	+ case SFP_ID_SFP_DD:
	+ case SFP_ID_DSFP:
	+ case SFP_ID_QSFP_CMIS:
	+ return (true);
	+ default:
	+ return (false);
	+ }
	+}
	+
	/** Get string descriptions of the given SFP/QSFP module info
	* The strings are static and do not need to be freed.
	* @see ifconfig_sfp_get_sfp_info to obtain the input info.
	diff --git a/lib/libifconfig/libifconfig_sfp.c b/lib/libifconfig/libifconfig_sfp.c
	--- a/lib/libifconfig/libifconfig_sfp.c
	+++ b/lib/libifconfig/libifconfig_sfp.c
	@@ -32,6 +32,7 @@
	#include <sys/socket.h>

	#include <net/if.h>
	+#include <net/cmis.h>
	#include <net/sff8436.h>
	#include <net/sff8472.h>

	@@ -114,6 +115,50 @@
	return (0);
	}

	+/*
	+ * Reads i2c data with CMIS page/bank selection.
	+ * For upper memory (offset >= 128), the page and bank fields select
	+ * which CMIS register page is mapped into the 128-255 address range.
	+ */
	+static int
	+read_i2c_page(struct i2c_info *ii, uint8_t addr, uint8_t page, uint8_t bank,
	+ uint8_t off, uint8_t len, uint8_t *buf)
	+{
	+ struct ifi2creq req;
	+ int i, l;
	+
	+ if (ii->error != 0)
	+ return (ii->error);
	+
	+ ii->ifr.ifr_data = (caddr_t)&req;
	+
	+ i = 0;
	+ l = 0;
	+ memset(&req, 0, sizeof(req));
	+ req.dev_addr = addr;
	+ req.offset = off;
	+ req.len = len;
	+ req.page = page;
	+ req.bank = bank;
	+
	+ while (len > 0) {
	+ l = MIN(sizeof(req.data), len);
	+ req.len = l;
	+ if (ifconfig_ioctlwrap(ii->h, AF_LOCAL, SIOCGI2CPB,
	+ &ii->ifr) != 0) {
	+ ii->error = errno;
	+ return (errno);
	+ }
	+
	+ memcpy(&buf[i], req.data, l);
	+ len -= l;
	+ i += l;
	+ req.offset += l;
	+ }
	+
	+ return (0);
	+}
	+
	static int
	i2c_info_init(struct i2c_info ii, ifconfig_handle_t h, const char *name)
	{
	@@ -193,6 +238,61 @@
	return (ii->error);
	}

	+static int
	+get_cmis_info(struct i2c_info ii, struct ifconfig_sfp_info sfp)
	+{
	+ uint8_t app_desc[CMIS_APP_DESC_SIZE];
	+ uint8_t dpconfig, appsel;
	+ uint8_t app_off;
	+
	+ /* Module ID from lower memory byte 0 */
	+ read_i2c(ii, CMIS_BASE, CMIS_ID, 1, &sfp->sfp_id);
	+
	+ /* Connector type from Page 00h byte 203 */
	+ read_i2c_page(ii, CMIS_BASE, 0x00, 0,
	+ CMIS_P0_CONNECTOR, 1, &sfp->sfp_conn);
	+
	+ /* Media type from lower memory byte 85 */
	+ read_i2c(ii, CMIS_BASE, CMIS_MEDIA_TYPE, 1,
	+ &sfp->sfp_cmis_media_type);
	+
	+ /*
	+ * Read the active AppSel code from the Active Control Set
	+ * (Page 11h, byte 206, bits 7:4). This tells us which
	+ * Application Descriptor is actually in use.
	+ * AppSel is 1-based; 0 means no application selected.
	+ */
	+ dpconfig = 0;
	+ read_i2c_page(ii, CMIS_BASE, 0x11, 0,
	+ CMIS_P11_ACS_DPCONFIG1, 1, &dpconfig);
	+ appsel = (dpconfig & CMIS_ACS_APPSEL_MASK) >> CMIS_ACS_APPSEL_SHIFT;
	+
	+ /* Fall back to first descriptor if AppSel is 0 or out of range */
	+ if (appsel == 0 \|\| appsel > CMIS_MAX_APP_DESC)
	+ appsel = 1;
	+
	+ /* Read the active Application Descriptor */
	+ app_off = CMIS_APP_DESC_START + (appsel - 1) * CMIS_APP_DESC_SIZE;
	+ read_i2c(ii, CMIS_BASE, app_off, CMIS_APP_DESC_SIZE, app_desc);
	+ if (ii->error != 0)
	+ return (ii->error);
	+
	+ /* Store MediaInterfaceID based on media type */
	+ switch (sfp->sfp_cmis_media_type) {
	+ case SFP_CMIS_MEDIA_TYPE_SMF:
	+ sfp->sfp_cmis_smf = app_desc[CMIS_APP_MEDIA_IF_ID];
	+ break;
	+ case SFP_CMIS_MEDIA_TYPE_MMF:
	+ sfp->sfp_cmis_mmf = app_desc[CMIS_APP_MEDIA_IF_ID];
	+ break;
	+ }
	+
	+ /* Extract media lane count from app descriptor byte 2, bits 3:0 */
	+ sfp->sfp_cmis_lanes = app_desc[CMIS_APP_LANE_COUNT] & 0x0F;
	+
	+ return (ii->error);
	+}
	+
	int
	ifconfig_sfp_get_sfp_info(ifconfig_handle_t *h,
	const char name, struct ifconfig_sfp_info sfp)
	@@ -205,6 +305,9 @@
	if (i2c_info_init(&ii, h, name) != 0)
	return (-1);

	+ if (ifconfig_sfp_id_is_cmis(ii.id))
	+ return (get_cmis_info(&ii, sfp));
	+
	/* Read bytes 3-10 at once */
	read_i2c(&ii, SFF_8472_BASE, SFF_8472_TRANS_START, 8, buf);
	if (ii.error != 0)
	@@ -246,6 +349,12 @@
	size_t
	ifconfig_sfp_channel_count(const struct ifconfig_sfp_info *sfp)
	{
	+ /* CMIS modules: use lane count from Application Descriptor */
	+ if (ifconfig_sfp_id_is_cmis(sfp->sfp_id)) {
	+ if (sfp->sfp_cmis_lanes > 0)
	+ return (sfp->sfp_cmis_lanes);
	+ return (0);
	+ }
	return (channel_count(sfp->sfp_id));
	}

	@@ -291,6 +400,41 @@
	return (ii->error);
	}

	+/*
	+ * Read CMIS vendor strings from Page 00h (upper memory).
	+ * Vendor info uses the same ASCII format as SFF-8436 but at
	+ * different offsets and requires page selection.
	+ */
	+static void
	+get_cmis_string(struct i2c_info ii, uint8_t off, char dst)
	+{
	+ read_i2c_page(ii, CMIS_BASE, 0x00, 0, off,
	+ SFF_VENDOR_STRING_SIZE, dst);
	+ dst += SFF_VENDOR_STRING_SIZE;
	+ do { dst-- = '\0'; } while (dst == 0x20);
	+}
	+
	+static void
	+get_cmis_date(struct i2c_info ii, uint8_t off, char dst)
	+{
	+ char buf[SFF_VENDOR_DATE_SIZE];
	+
	+ read_i2c_page(ii, CMIS_BASE, 0x00, 0, off,
	+ SFF_VENDOR_DATE_SIZE, buf);
	+ sprintf(dst, "20%c%c-%c%c-%c%c", buf[0], buf[1], buf[2], buf[3],
	+ buf[4], buf[5]);
	+}
	+
	+static int
	+get_cmis_vendor_info(struct i2c_info ii, struct ifconfig_sfp_vendor_info vi)
	+{
	+ get_cmis_string(ii, CMIS_P0_VENDOR_NAME, vi->name);
	+ get_cmis_string(ii, CMIS_P0_VENDOR_PN, vi->pn);
	+ get_cmis_string(ii, CMIS_P0_VENDOR_SN, vi->sn);
	+ get_cmis_date(ii, CMIS_P0_DATE_CODE, vi->date);
	+ return (ii->error);
	+}
	+
	int
	ifconfig_sfp_get_sfp_vendor_info(ifconfig_handle_t *h,
	const char name, struct ifconfig_sfp_vendor_info vi)
	@@ -302,6 +446,8 @@
	if (i2c_info_init(&ii, h, name) != 0)
	return (-1);

	+ if (ifconfig_sfp_id_is_cmis(ii.id))
	+ return (get_cmis_vendor_info(&ii, vi));
	if (ifconfig_sfp_id_is_qsfp(ii.id))
	return (get_qsfp_vendor_info(&ii, vi));
	return (get_sfp_vendor_info(&ii, vi));
	@@ -457,6 +603,47 @@
	return (ii->error);
	}

	+/*
	+ * Read CMIS module status: temperature and voltage from lower memory,
	+ * per-lane TX power, TX bias, and RX power from Page 11h Bank 0.
	+ */
	+static int
	+get_cmis_status(struct i2c_info ii, struct ifconfig_sfp_status ss,
	+ size_t channels)
	+{
	+ /* Temperature and voltage are in lower memory (same format as SFF) */
	+ ss->temp = get_sff_temp(ii, CMIS_BASE, CMIS_TEMP);
	+ ss->voltage = get_sff_voltage(ii, CMIS_BASE, CMIS_VCC);
	+
	+ if (channels == 0)
	+ return (ii->error);
	+
	+ ss->channel = calloc(channels, sizeof(*ss->channel));
	+ if (ss->channel == NULL) {
	+ ii->h->error.errtype = OTHER;
	+ ii->h->error.errcode = ENOMEM;
	+ return (-1);
	+ }
	+
	+ /* Read per-lane monitors from Page 11h Bank 0 */
	+ for (size_t chan = 0; chan < channels; ++chan) {
	+ uint8_t off;
	+ uint8_t buf[2];
	+
	+ /* RX optical power */
	+ off = CMIS_P11_RX_PWR_1 + chan * CMIS_LANE_MON_SIZE;
	+ read_i2c_page(ii, CMIS_BASE, 0x11, 0, off, 2, buf);
	+ ss->channel[chan].rx = (buf[0] << 8) \| buf[1];
	+
	+ /* TX bias current */
	+ off = CMIS_P11_TX_BIAS_1 + chan * CMIS_LANE_MON_SIZE;
	+ read_i2c_page(ii, CMIS_BASE, 0x11, 0, off, 2, buf);
	+ ss->channel[chan].tx = (buf[0] << 8) \| buf[1];
	+ }
	+
	+ return (ii->error);
	+}
	+
	int
	ifconfig_sfp_get_sfp_status(ifconfig_handle_t h, const char name,
	struct ifconfig_sfp_status *ss)
	@@ -468,6 +655,20 @@
	if (i2c_info_init(&ii, h, name) != 0)
	return (-1);

	+ if (ifconfig_sfp_id_is_cmis(ii.id)) {
	+ /*
	+ * For CMIS, we need the lane count from the module info.
	+ * Read the first Application Descriptor to get it.
	+ */
	+ uint8_t app_desc[CMIS_APP_DESC_SIZE];
	+ size_t channels;
	+
	+ read_i2c(&ii, CMIS_BASE, CMIS_APP_DESC_START,
	+ CMIS_APP_DESC_SIZE, app_desc);
	+ channels = app_desc[CMIS_APP_LANE_COUNT] & 0x0F;
	+ return (get_cmis_status(&ii, ss, channels));
	+ }
	+
	if (ifconfig_sfp_id_is_qsfp(ii.id))
	return (get_qsfp_status(&ii, ss));
	return (get_sfp_status(&ii, ss));
	@@ -527,6 +728,21 @@
	ifconfig_sfp_physical_spec(const struct ifconfig_sfp_info *sfp,
	const struct ifconfig_sfp_info_strings *strings)
	{
	+ /* CMIS modules: look up media interface ID based on media type */
	+ if (ifconfig_sfp_id_is_cmis(sfp->sfp_id)) {
	+ switch (sfp->sfp_cmis_media_type) {
	+ case SFP_CMIS_MEDIA_TYPE_SMF:
	+ if (strings->sfp_cmis_smf != NULL)
	+ return (strings->sfp_cmis_smf);
	+ break;
	+ case SFP_CMIS_MEDIA_TYPE_MMF:
	+ if (strings->sfp_cmis_mmf != NULL)
	+ return (strings->sfp_cmis_mmf);
	+ break;
	+ }
	+ return ("Unknown");
	+ }
	+
	switch (sfp->sfp_id) {
	case SFP_ID_UNKNOWN:
	break;
	@@ -562,7 +778,14 @@
	if (i2c_info_init(&ii, h, name) != 0)
	return (-1);

	- if (ifconfig_sfp_id_is_qsfp(ii.id)) {
	+ if (ifconfig_sfp_id_is_cmis(ii.id)) {
	+ /* Lower memory (0-127), Page 00h (128-255), Page 11h */
	+ read_i2c(&ii, CMIS_BASE, 0, 128, buf);
	+ read_i2c_page(&ii, CMIS_BASE, 0x00, 0, 128, 128,
	+ buf + 128);
	+ read_i2c_page(&ii, CMIS_BASE, 0x11, 0, 128, 128,
	+ buf + CMIS_DUMP_P11);
	+ } else if (ifconfig_sfp_id_is_qsfp(ii.id)) {
	read_i2c(&ii, SFF_8436_BASE, QSFP_DUMP0_START, QSFP_DUMP0_SIZE,
	buf + QSFP_DUMP0_START);
	read_i2c(&ii, SFF_8436_BASE, QSFP_DUMP1_START, QSFP_DUMP1_SIZE,
	@@ -580,6 +803,9 @@
	{
	uint8_t id_byte = dp->data[0];

	+ if (ifconfig_sfp_id_is_cmis((enum sfp_id)id_byte))
	+ return (3);
	+
	switch ((enum sfp_id)id_byte) {
	case SFP_ID_UNKNOWN:
	return (0);
	diff --git a/lib/libifconfig/sfp.lua b/lib/libifconfig/sfp.lua
	--- a/lib/libifconfig/sfp.lua
	+++ b/lib/libifconfig/sfp.lua
	@@ -359,6 +359,126 @@
	{0x0, "UNSPECIFIED", "Unspecified"},
	},
	},
	+
	+ "CMIS (OIF-CMIS-05.3) Media Type Encodings (Table 8-20)",
	+ {
	+ name = "cmis_media_type",
	+ description = "CMIS media type",
	+ bits = 8,
	+ values = {
	+ {0x00, "UNDEFINED", "Undefined"},
	+ {0x01, "MMF", "Optical: MMF"},
	+ {0x02, "SMF", "Optical: SMF"},
	+ {0x03, "COPPER", "Passive/Linear Active Copper"},
	+ {0x04, "ACTIVE", "Active Cable"},
	+ {0x05, "BASET", "BASE-T"},
	+ },
	+ },
	+
	+ "CMIS Media Lane Count (from Application Descriptor)",
	+ {
	+ name = "cmis_lanes",
	+ description = "CMIS media lane count",
	+ bits = 8,
	+ values = {
	+ {0, "UNKNOWN", "Unknown"},
	+ {1, "1", "1 lane"},
	+ {2, "2", "2 lanes"},
	+ {4, "4", "4 lanes"},
	+ {8, "8", "8 lanes"},
	+ },
	+ },
	+
	+ "SFF-8024 Table 4-7: SMF Media Interface IDs (for CMIS MediaType=02h)",
	+ "Verified against SFF-8024 Rev 4.6+ and SONiC sff8024.py",
	+ {
	+ name = "cmis_smf",
	+ description = "CMIS SMF media interface",
	+ bits = 8,
	+ values = {
	+ {0x00, "UNDEFINED", "Undefined"},
	+ {0x01, "10GBASE_LW", "10GBASE-LW"},
	+ {0x02, "10GBASE_EW", "10GBASE-EW"},
	+ {0x03, "10G_ZW", "10G-ZW"},
	+ {0x04, "10GBASE_LR", "10GBASE-LR"},
	+ {0x05, "10GBASE_ER", "10GBASE-ER"},
	+ {0x06, "10G_ZR", "10G-ZR"},
	+ {0x07, "25GBASE_LR", "25GBASE-LR"},
	+ {0x08, "25GBASE_ER", "25GBASE-ER"},
	+ {0x09, "40GBASE_LR4", "40GBASE-LR4"},
	+ {0x0A, "40GBASE_FR", "40GBASE-FR"},
	+ {0x0B, "50GBASE_FR", "50GBASE-FR"},
	+ {0x0C, "50GBASE_LR", "50GBASE-LR"},
	+ {0x0D, "100GBASE_LR4", "100GBASE-LR4"},
	+ {0x0E, "100GBASE_ER4", "100GBASE-ER4"},
	+ {0x0F, "100G_PSM4", "100G PSM4"},
	+ {0x10, "100G_CWDM4", "100G CWDM4"},
	+ {0x11, "100G_4WDM_10", "100G 4WDM-10"},
	+ {0x12, "100G_4WDM_20", "100G 4WDM-20"},
	+ {0x13, "100G_4WDM_40", "100G 4WDM-40"},
	+ {0x14, "100GBASE_DR", "100GBASE-DR"},
	+ {0x15, "100G_FR", "100G-FR/100GBASE-FR1"},
	+ {0x16, "100G_LR", "100G-LR/100GBASE-LR1"},
	+ {0x17, "200GBASE_DR4", "200GBASE-DR4"},
	+ {0x18, "200GBASE_FR4", "200GBASE-FR4"},
	+ {0x19, "200GBASE_LR4", "200GBASE-LR4"},
	+ {0x1A, "400GBASE_FR8", "400GBASE-FR8"},
	+ {0x1B, "400GBASE_LR8", "400GBASE-LR8"},
	+ {0x1C, "400GBASE_DR4", "400GBASE-DR4"},
	+ {0x1D, "400G_FR4", "400G-FR4/400GBASE-FR4"},
	+ {0x1E, "400G_LR4_10", "400G-LR4-10"},
	+ {0x1F, "8GFC_SM", "8GFC-SM"},
	+ {0x20, "10GFC_SM", "10GFC-SM"},
	+ {0x21, "16GFC_SM", "16GFC-SM"},
	+ {0x22, "32GFC_SM", "32GFC-SM"},
	+ {0x23, "64GFC_SM", "64GFC-SM"},
	+ {0x24, "128GFC_PSM4", "128GFC-PSM4"},
	+ {0x25, "256GFC_PSM4", "256GFC-PSM4"},
	+ {0x34, "100G_CWDM4_OCP", "100G CWDM4-OCP"},
	+ {0x3E, "400ZR_DWDM", "400ZR DWDM"},
	+ {0x40, "50GBASE_ER", "50GBASE-ER"},
	+ {0x41, "200GBASE_ER4", "200GBASE-ER4"},
	+ {0x42, "400GBASE_ER8", "400GBASE-ER8"},
	+ {0x43, "400GBASE_LR4_6", "400GBASE-LR4-6"},
	+ },
	+ },
	+
	+ "SFF-8024 Table 4-6: MMF Media Interface IDs (for CMIS MediaType=01h)",
	+ "Verified against SFF-8024 Rev 4.6+ and SONiC sff8024.py",
	+ {
	+ name = "cmis_mmf",
	+ description = "CMIS MMF media interface",
	+ bits = 8,
	+ values = {
	+ {0x00, "UNDEFINED", "Undefined"},
	+ {0x01, "10GBASE_SW", "10GBASE-SW"},
	+ {0x02, "10GBASE_SR", "10GBASE-SR"},
	+ {0x03, "25GBASE_SR", "25GBASE-SR"},
	+ {0x04, "40GBASE_SR4", "40GBASE-SR4"},
	+ {0x05, "40GE_SWDM4", "40GE SWDM4"},
	+ {0x06, "40GE_BIDI", "40GE BiDi"},
	+ {0x07, "50GBASE_SR", "50GBASE-SR"},
	+ {0x08, "100GBASE_SR10", "100GBASE-SR10"},
	+ {0x09, "100GBASE_SR4", "100GBASE-SR4"},
	+ {0x0A, "100GE_SWDM4", "100GE SWDM4"},
	+ {0x0B, "100GE_BIDI", "100GE BiDi"},
	+ {0x0C, "100GBASE_SR2", "100GBASE-SR2"},
	+ {0x0D, "100G_SR", "100G-SR"},
	+ {0x0E, "200GBASE_SR4", "200GBASE-SR4"},
	+ {0x0F, "400GBASE_SR16", "400GBASE-SR16"},
	+ {0x10, "400GBASE_SR8", "400GBASE-SR8"},
	+ {0x11, "400G_SR4", "400G-SR4"},
	+ {0x12, "800G_SR8", "800G-SR8"},
	+ {0x13, "8GFC_MM", "8GFC-MM"},
	+ {0x14, "10GFC_MM", "10GFC-MM"},
	+ {0x15, "16GFC_MM", "16GFC-MM"},
	+ {0x16, "32GFC_MM", "32GFC-MM"},
	+ {0x17, "64GFC_MM", "64GFC-MM"},
	+ {0x18, "128GFC_MM4", "128GFC-MM4"},
	+ {0x19, "256GFC_MM4", "256GFC-MM4"},
	+ {0x1A, "400GBASE_SR4_2", "400GBASE-SR4.2"},
	+ },
	+ },
	}

	-- Nothing else in this context.
	diff --git a/sbin/ifconfig/sfp.c b/sbin/ifconfig/sfp.c
	--- a/sbin/ifconfig/sfp.c
	+++ b/sbin/ifconfig/sfp.c
	@@ -77,7 +77,9 @@
	printf("\tvendor: %s PN: %s SN: %s DATE: %s\n",
	vendor_info.name, vendor_info.pn, vendor_info.sn, vendor_info.date);

	- if (ifconfig_sfp_id_is_qsfp(info.sfp_id)) {
	+ if (ifconfig_sfp_id_is_cmis(info.sfp_id)) {
	+ /* CMIS: no legacy compliance info to show */
	+ } else if (ifconfig_sfp_id_is_qsfp(info.sfp_id)) {
	if (verbose > 1)
	printf("\tcompliance level: %s\n", strings.sfp_rev);
	} else {
	@@ -113,7 +115,17 @@
	if (ifconfig_sfp_get_sfp_dump(lifh, ctx->ifname, &dump) == -1)
	return;

	- if (ifconfig_sfp_id_is_qsfp(info.sfp_id)) {
	+ if (ifconfig_sfp_id_is_cmis(info.sfp_id)) {
	+ printf("\n\tCMIS DUMP (Lower Memory 0..127):\n");
	+ hexdump(dump.data, 128,
	+ "\t", HD_OMIT_COUNT \| HD_OMIT_CHARS);
	+ printf("\n\tCMIS DUMP (Page 00h 128..255):\n");
	+ hexdump(dump.data + 128, 128,
	+ "\t", HD_OMIT_COUNT \| HD_OMIT_CHARS);
	+ printf("\n\tCMIS DUMP (Page 11h 128..255):\n");
	+ hexdump(dump.data + CMIS_DUMP_P11, 128,
	+ "\t", HD_OMIT_COUNT \| HD_OMIT_CHARS);
	+ } else if (ifconfig_sfp_id_is_qsfp(info.sfp_id)) {
	printf("\n\tSFF8436 DUMP (0xA0 128..255 range):\n");
	hexdump(dump.data + QSFP_DUMP1_START, QSFP_DUMP1_SIZE,
	"\t", HD_OMIT_COUNT \| HD_OMIT_CHARS);
	diff --git a/sys/net/cmis.h b/sys/net/cmis.h
	new file mode 100644
	--- /dev/null
	+++ b/sys/net/cmis.h
	@@ -0,0 +1,450 @@
	+/*-
	+ * Copyright (c) 2026 Netflix Inc.
	+ *
	+ * SPDX-License-Identifier: BSD-2-Clause
	+ */
	+
	+/*
	+ * The following set of constants are from the OIF Common Management
	+ * Interface Specification (CMIS) revision 5.3, September 2024.
	+ *
	+ * CMIS defines a 256-byte addressable memory with lower (0-127) and
	+ * upper (128-255) regions. Lower memory is always accessible.
	+ * Upper memory is paged via byte 127 (page select) and byte 126
	+ * (bank select).
	+ *
	+ * All values are read across an I2C bus at address 0xA0.
	+ */
	+
	+#ifndef _NET_CMIS_H_
	+#define _NET_CMIS_H_
	+
	+#define CMIS_BASE 0xA0 /* Base I2C address for all requests */
	+
	+/* CMIS Module Types (SFF-8024 Identifier, byte 0) */
	+#define CMIS_ID_QSFP_DD 0x18 /* QSFP-DD */
	+#define CMIS_ID_QSFP8X 0x19 /* QSFP 8X (OSFP) */
	+#define CMIS_ID_SFP_DD 0x1A /* SFP-DD */
	+#define CMIS_ID_DSFP 0x1B /* DSFP */
	+#define CMIS_ID_QSFP_CMIS 0x1E /* QSFP+ with CMIS */
	+
	+/* Table 8-4: Lower Memory Map (bytes 0x00-0x7F) */
	+enum {
	+ /* Table 8-5: Management Characteristics (bytes 0-2) */
	+ CMIS_ID = 0, /* SFF-8024 Identifier */
	+ CMIS_REV = 1, /* CMIS revision (major.minor) */
	+ CMIS_MODULE_TYPE = 2, /* Memory model, config options */
	+
	+ /* Table 8-6: Global Status (byte 3) */
	+ CMIS_MODULE_STATE = 3, /* Module state, interrupt status */
	+
	+ /* Table 8-8: Flags Summary (bytes 4-7) */
	+ CMIS_FLAGS_BANK0 = 4, /* Flags summary, bank 0 */
	+ CMIS_FLAGS_BANK1 = 5, /* Flags summary, bank 1 */
	+ CMIS_FLAGS_BANK2 = 6, /* Flags summary, bank 2 */
	+ CMIS_FLAGS_BANK3 = 7, /* Flags summary, bank 3 */
	+
	+ /* Table 8-9: Module-Level Flags (bytes 8-13) */
	+ CMIS_MOD_FLAGS_START = 8, /* Module firmware/state flags */
	+ CMIS_MOD_FLAGS_TEMP_VCC = 9, /* Temp/VCC alarm/warning flags */
	+ CMIS_MOD_FLAGS_AUX = 10, /* Aux monitor alarm/warning flags */
	+ CMIS_MOD_FLAGS_CUSTOM = 11, /* Custom/Aux3 monitor flags */
	+ CMIS_MOD_FLAGS_RSVD = 12, /* Reserved */
	+ CMIS_MOD_FLAGS_VENDOR = 13, /* Custom module-level flags */
	+
	+ /* Table 8-10: Module-Level Monitor Values (bytes 14-25) */
	+ CMIS_TEMP = 14, /* S16 Temperature (1/256 deg C) */
	+ CMIS_VCC = 16, /* U16 Supply Voltage (100 uV) */
	+ CMIS_AUX1 = 18, /* S16 Aux1 Monitor */
	+ CMIS_AUX2 = 20, /* S16 Aux2 Monitor */
	+ CMIS_AUX3 = 22, /* S16 Aux3 Monitor */
	+ CMIS_CUSTOM_MON = 24, /* S16/U16 Custom Monitor */
	+
	+ /* Table 8-11: Module Global Controls (bytes 26-30) */
	+ CMIS_MOD_CTRL = 26, /* Global control bits */
	+ CMIS_MOD_CTRL2 = 27, /* Global control bits (cont.) */
	+ CMIS_MOD_CTRL3 = 28, /* Global control bits (cont.) */
	+ CMIS_MOD_CTRL4 = 29, /* Global control bits (cont.) */
	+ CMIS_MOD_CTRL5 = 30, /* Global control bits (cont.) */
	+
	+ /* Table 8-12: Module Level Masks (bytes 31-36) */
	+ CMIS_MOD_MASKS_START = 31, /* Module-level masks start */
	+ CMIS_MOD_MASKS_END = 36, /* Module-level masks end */
	+
	+ /* Table 8-13: CDB Command Status (bytes 37-38) */
	+ CMIS_CDB_STATUS1 = 37, /* CDB instance 1 status */
	+ CMIS_CDB_STATUS2 = 38, /* CDB instance 2 status */
	+
	+ /* Table 8-15: Module Active Firmware Version (bytes 39-40) */
	+ CMIS_FW_VER_MAJOR = 39, /* Active firmware major version */
	+ CMIS_FW_VER_MINOR = 40, /* Active firmware minor version */
	+
	+ /* Table 8-16: Fault Information (byte 41) */
	+ CMIS_FAULT_CAUSE = 41, /* Fault cause for ModuleFault */
	+
	+ /* Table 8-17: Miscellaneous Status (bytes 42-45) */
	+ CMIS_MISC_STATUS_START = 42, /* Password status, etc. */
	+ CMIS_MISC_STATUS_END = 45,
	+
	+ /* Table 8-18: Extended Module Information (bytes 56-63) */
	+ CMIS_EXT_MOD_INFO_START = 56,
	+ CMIS_EXT_MOD_INFO_END = 63,
	+
	+ /* Table 8-21: Media Type (byte 85) */
	+ CMIS_MEDIA_TYPE = 85, /* MediaType encoding */
	+
	+ /* Table 8-23: Application Descriptors (bytes 86-117) */
	+ CMIS_APP_DESC_START = 86, /* First Application Descriptor */
	+ CMIS_APP_DESC1 = 86, /* AppDescriptor 1 (AppSel 1) */
	+ CMIS_APP_DESC2 = 90, /* AppDescriptor 2 (AppSel 2) */
	+ CMIS_APP_DESC3 = 94, /* AppDescriptor 3 (AppSel 3) */
	+ CMIS_APP_DESC4 = 98, /* AppDescriptor 4 (AppSel 4) */
	+ CMIS_APP_DESC5 = 102, /* AppDescriptor 5 (AppSel 5) */
	+ CMIS_APP_DESC6 = 106, /* AppDescriptor 6 (AppSel 6) */
	+ CMIS_APP_DESC7 = 110, /* AppDescriptor 7 (AppSel 7) */
	+ CMIS_APP_DESC8 = 114, /* AppDescriptor 8 (AppSel 8) */
	+
	+ /* Table 8-24: Password (bytes 118-125) */
	+ CMIS_PASSWORD_CHANGE = 118, /* Password change entry (4 bytes) */
	+ CMIS_PASSWORD_ENTRY = 122, /* Password entry area (4 bytes) */
	+
	+ /* Table 8-25: Page Mapping (bytes 126-127) */
	+ CMIS_BANK_SEL = 126, /* Bank select */
	+ CMIS_PAGE_SEL = 127, /* Page select */
	+};
	+
	+/*
	+ * Byte 2 (CMIS_MODULE_TYPE) bit definitions (Table 8-5)
	+ */
	+#define CMIS_MODULE_TYPE_FLAT (1 << 7) /* MemoryModel: 1=flat, 0=paged */
	+#define CMIS_MODULE_TYPE_STEPPED (1 << 6) /* SteppedConfigOnly */
	+#define CMIS_MODULE_TYPE_MCISPEED_MASK 0x3C /* MciMaxSpeed, bits 5:2 */
	+#define CMIS_MODULE_TYPE_MCISPEED_SHIFT 2
	+#define CMIS_MODULE_TYPE_AUTOCOM_MASK 0x03 /* AutoCommissioning, bits 1:0 */
	+
	+/* MciMaxSpeed values (I2CMCI) */
	+#define CMIS_MCISPEED_400KHZ 0 /* Up to 400 kHz */
	+#define CMIS_MCISPEED_1MHZ 1 /* Up to 1 MHz */
	+#define CMIS_MCISPEED_3_4MHZ 2 /* Up to 3.4 MHz */
	+
	+/* AutoCommissioning values (when SteppedConfigOnly=1) */
	+#define CMIS_AUTOCOM_NONE 0x00 /* Neither regular nor hot */
	+#define CMIS_AUTOCOM_REGULAR 0x01 /* Only regular (ApplyDPInit) */
	+#define CMIS_AUTOCOM_HOT 0x02 /* Only hot (ApplyImmediate) */
	+
	+/*
	+ * Byte 3 (CMIS_MODULE_STATE) bit definitions (Table 8-6)
	+ */
	+#define CMIS_MODULE_STATE_MASK 0x0E /* ModuleState, bits 3:1 */
	+#define CMIS_MODULE_STATE_SHIFT 1
	+#define CMIS_MODULE_STATE_INTL 0x01 /* InterruptDeasserted (bit 0) */
	+
	+/* Table 8-7: Module State Encodings (bits 3:1 of byte 3) */
	+#define CMIS_STATE_LOWPWR 1 /* ModuleLowPwr */
	+#define CMIS_STATE_PWRUP 2 /* ModulePwrUp */
	+#define CMIS_STATE_READY 3 /* ModuleReady */
	+#define CMIS_STATE_PWRDN 4 /* ModulePwrDn */
	+#define CMIS_STATE_FAULT 5 /* ModuleFault */
	+
	+/*
	+ * Bytes 4-7 (CMIS_FLAGS_BANKn) bit definitions (Table 8-8)
	+ * Same layout for all 4 bank bytes.
	+ */
	+#define CMIS_FLAGS_PAGE2CH (1 << 3) /* Flags on Page 2Ch */
	+#define CMIS_FLAGS_PAGE14H (1 << 2) /* Flags on Page 14h */
	+#define CMIS_FLAGS_PAGE12H (1 << 1) /* Flags on Page 12h */
	+#define CMIS_FLAGS_PAGE11H (1 << 0) /* Flags on Page 11h */
	+
	+/*
	+ * Byte 8 (CMIS_MOD_FLAGS_START) bit definitions (Table 8-9)
	+ */
	+#define CMIS_FLAG_CDB_COMPLETE2 (1 << 7) /* CdbCmdCompleteFlag2 */
	+#define CMIS_FLAG_CDB_COMPLETE1 (1 << 6) /* CdbCmdCompleteFlag1 */
	+#define CMIS_FLAG_DP_FW_ERROR (1 << 2) /* DataPathFirmwareErrorFlag */
	+#define CMIS_FLAG_MOD_FW_ERROR (1 << 1) /* ModuleFirmwareErrorFlag */
	+#define CMIS_FLAG_STATE_CHANGED (1 << 0) /* ModuleStateChangedFlag */
	+
	+/*
	+ * Byte 9 (CMIS_MOD_FLAGS_TEMP_VCC) bit definitions (Table 8-9)
	+ */
	+#define CMIS_FLAG_VCC_LOW_WARN (1 << 7) /* VccMonLowWarningFlag */
	+#define CMIS_FLAG_VCC_HIGH_WARN (1 << 6) /* VccMonHighWarningFlag */
	+#define CMIS_FLAG_VCC_LOW_ALM (1 << 5) /* VccMonLowAlarmFlag */
	+#define CMIS_FLAG_VCC_HIGH_ALM (1 << 4) /* VccMonHighAlarmFlag */
	+#define CMIS_FLAG_TEMP_LOW_WARN (1 << 3) /* TempMonLowWarningFlag */
	+#define CMIS_FLAG_TEMP_HIGH_WARN (1 << 2) /* TempMonHighWarningFlag */
	+#define CMIS_FLAG_TEMP_LOW_ALM (1 << 1) /* TempMonLowAlarmFlag */
	+#define CMIS_FLAG_TEMP_HIGH_ALM (1 << 0) /* TempMonHighAlarmFlag */
	+
	+/*
	+ * Byte 10 (CMIS_MOD_FLAGS_AUX) bit definitions (Table 8-9)
	+ */
	+#define CMIS_FLAG_AUX2_LOW_WARN (1 << 7)
	+#define CMIS_FLAG_AUX2_HIGH_WARN (1 << 6)
	+#define CMIS_FLAG_AUX2_LOW_ALM (1 << 5)
	+#define CMIS_FLAG_AUX2_HIGH_ALM (1 << 4)
	+#define CMIS_FLAG_AUX1_LOW_WARN (1 << 3)
	+#define CMIS_FLAG_AUX1_HIGH_WARN (1 << 2)
	+#define CMIS_FLAG_AUX1_LOW_ALM (1 << 1)
	+#define CMIS_FLAG_AUX1_HIGH_ALM (1 << 0)
	+
	+/*
	+ * Byte 11 (CMIS_MOD_FLAGS_CUSTOM) bit definitions (Table 8-9)
	+ */
	+#define CMIS_FLAG_CUST_LOW_WARN (1 << 7)
	+#define CMIS_FLAG_CUST_HIGH_WARN (1 << 6)
	+#define CMIS_FLAG_CUST_LOW_ALM (1 << 5)
	+#define CMIS_FLAG_CUST_HIGH_ALM (1 << 4)
	+#define CMIS_FLAG_AUX3_LOW_WARN (1 << 3)
	+#define CMIS_FLAG_AUX3_HIGH_WARN (1 << 2)
	+#define CMIS_FLAG_AUX3_LOW_ALM (1 << 1)
	+#define CMIS_FLAG_AUX3_HIGH_ALM (1 << 0)
	+
	+/*
	+ * Byte 26 (CMIS_MOD_CTRL) bit definitions (Table 8-11)
	+ */
	+#define CMIS_CTRL_BANK_BCAST (1 << 7) /* BankBroadcastEnable */
	+#define CMIS_CTRL_LOWPWR_HW (1 << 6) /* LowPwrAllowRequestHW */
	+#define CMIS_CTRL_SQUELCH_METHOD (1 << 5) /* SquelchMethodSelect */
	+#define CMIS_CTRL_LOWPWR_SW (1 << 4) /* LowPwrRequestSW */
	+#define CMIS_CTRL_SW_RESET (1 << 3) /* SoftwareReset */
	+
	+/*
	+ * Byte 27 (CMIS_MOD_CTRL2) bit definitions (Table 8-11)
	+ */
	+#define CMIS_CTRL2_MCISPEED_MASK 0x0F /* MciSpeedConfiguration, bits 3:0 */
	+
	+/*
	+ * Bytes 31-36 mask bits mirror bytes 8-13 flag bits (Table 8-12)
	+ * Use the same bit positions as CMIS_FLAG_* above.
	+ */
	+
	+/*
	+ * Bytes 37-38 (CDB Status) bit definitions (Table 8-14)
	+ */
	+#define CMIS_CDB_BUSY (1 << 7) /* CdbIsBusy */
	+#define CMIS_CDB_FAILED (1 << 6) /* CdbHasFailed */
	+#define CMIS_CDB_RESULT_MASK 0x3F /* CdbCommandResult, bits 5:0 */
	+
	+/* Table 8-20: Media Type Encodings */
	+#define CMIS_MEDIA_TYPE_UNDEF 0x00 /* Undefined */
	+#define CMIS_MEDIA_TYPE_MMF 0x01 /* Optical: MMF */
	+#define CMIS_MEDIA_TYPE_SMF 0x02 /* Optical: SMF */
	+#define CMIS_MEDIA_TYPE_COPPER 0x03 /* Passive/Active Copper */
	+#define CMIS_MEDIA_TYPE_ACTIVE 0x04 /* Active Cable */
	+#define CMIS_MEDIA_TYPE_BASET 0x05 /* BASE-T */
	+
	+/* Application Descriptor constants */
	+#define CMIS_APP_DESC_SIZE 4 /* Bytes per descriptor */
	+#define CMIS_MAX_APP_DESC 8 /* Max descriptors in lower memory */
	+
	+/* Table 8-22: Offsets within an Application Descriptor */
	+#define CMIS_APP_HOST_IF_ID 0 /* HostInterfaceID */
	+#define CMIS_APP_MEDIA_IF_ID 1 /* MediaInterfaceID */
	+#define CMIS_APP_LANE_COUNT 2 /* Host[7:4], Media[3:0] */
	+#define CMIS_APP_HOST_ASSIGN 3 /* HostLaneAssignment */
	+#define CMIS_APP_HOST_LANES_MASK 0xF0 /* HostLaneCount, bits 7:4 */
	+#define CMIS_APP_HOST_LANES_SHIFT 4
	+#define CMIS_APP_MEDIA_LANES_MASK 0x0F /* MediaLaneCount, bits 3:0 */
	+
	+/*
	+ * Table 8-26: Page 00h - Administrative Information
	+ * Accessed with page=0x00, bank=0.
	+ */
	+enum {
	+ CMIS_P0_ID = 128, /* SFF-8024 Identifier copy */
	+ CMIS_P0_VENDOR_NAME = 129, /* Vendor name (16 bytes, ASCII) */
	+ CMIS_P0_VENDOR_OUI = 145, /* Vendor IEEE OUI (3 bytes) */
	+ CMIS_P0_VENDOR_PN = 148, /* Part number (16 bytes, ASCII) */
	+ CMIS_P0_VENDOR_REV = 164, /* Vendor revision (2 bytes) */
	+ CMIS_P0_VENDOR_SN = 166, /* Serial number (16 bytes, ASCII) */
	+ CMIS_P0_DATE_CODE = 182, /* Date code (8 bytes: YYMMDDLL) */
	+ CMIS_P0_CLEI = 190, /* CLEI code (10 bytes, ASCII) */
	+ CMIS_P0_MOD_POWER = 200, /* Module power class */
	+ CMIS_P0_MAX_POWER = 201, /* Max power (multiples of 0.25W) */
	+ CMIS_P0_CABLE_LEN = 202, /* Cable assembly link length */
	+ CMIS_P0_CONNECTOR = 203, /* Connector type (SFF-8024) */
	+ CMIS_P0_COPPER_ATTEN = 204, /* Copper cable attenuation (6 bytes) */
	+ CMIS_P0_MEDIA_LANE_INFO = 210, /* Supported near end media lanes */
	+ CMIS_P0_CABLE_ASM_INFO = 211, /* Far end breakout info */
	+ CMIS_P0_MEDIA_TECH = 212, /* Media interface technology */
	+ CMIS_P0_MCI_ADVERT = 213, /* MCI advertisement (2 bytes) */
	+ CMIS_P0_PAGE_CKSUM = 222, /* Page checksum (bytes 128-221) */
	+ CMIS_P0_CUSTOM = 223, /* Custom (33 bytes) */
	+};
	+
	+/*
	+ * Table 8-82: Page 11h - Lane Status and Data Path Status
	+ * Accessed with page=0x11, bank=0 (lanes 1-8).
	+ */
	+enum {
	+ /* Table 8-83: Data Path States (bytes 128-131) */
	+ CMIS_P11_DPSTATE_12 = 128, /* DPState for host lanes 1-2 */
	+ CMIS_P11_DPSTATE_34 = 129, /* DPState for host lanes 3-4 */
	+ CMIS_P11_DPSTATE_56 = 130, /* DPState for host lanes 5-6 */
	+ CMIS_P11_DPSTATE_78 = 131, /* DPState for host lanes 7-8 */
	+
	+ /* Table 8-85: Lane Output Status (bytes 132-133) */
	+ CMIS_P11_OUTPUT_RX = 132, /* OutputStatusRx per lane */
	+ CMIS_P11_OUTPUT_TX = 133, /* OutputStatusTx per lane */
	+
	+ /* Table 8-86: State Changed Flags (bytes 134-135) */
	+ CMIS_P11_DPSTATE_CHGD = 134, /* DPStateChanged flags */
	+ CMIS_P11_OUTPUT_CHGD_TX = 135, /* OutputStatusChangedTx flags*/
	+
	+ /* Table 8-87: Lane-Specific Tx Flags (bytes 136-141) */
	+ CMIS_P11_TX_FAULT = 136, /* TxFault per lane */
	+ CMIS_P11_TX_LOS = 137, /* TxLOS per lane */
	+ CMIS_P11_TX_CDR_LOL = 138, /* TxCDRLOL per lane */
	+ CMIS_P11_TX_ADPT_EQ_FAIL = 139, /* TxAdaptEqFail per lane */
	+ CMIS_P11_TX_PWR_HIGH_ALM = 140, /* TxPowerHighAlarm per lane */
	+ CMIS_P11_TX_PWR_LOW_ALM = 141, /* TxPowerLowAlarm per lane */
	+ CMIS_P11_TX_BIAS_HIGH_ALM = 142, /* TxBiasHighAlarm per lane */
	+ CMIS_P11_TX_BIAS_LOW_ALM = 143, /* TxBiasLowAlarm per lane */
	+ CMIS_P11_TX_PWR_HIGH_WARN = 144, /* TxPowerHighWarning per lane*/
	+ CMIS_P11_TX_PWR_LOW_WARN = 145, /* TxPowerLowWarning per lane */
	+ CMIS_P11_TX_BIAS_HIGH_WARN = 146, /* TxBiasHighWarning per lane */
	+ CMIS_P11_TX_BIAS_LOW_WARN = 147, /* TxBiasLowWarning per lane */
	+
	+ /* Table 8-88: Rx Flags (bytes 148-153) */
	+ CMIS_P11_RX_LOS = 148, /* RxLOS per lane */
	+ CMIS_P11_RX_CDR_LOL = 149, /* RxCDRLOL per lane */
	+ CMIS_P11_RX_PWR_HIGH_ALM = 150, /* RxPowerHighAlarm per lane */
	+ CMIS_P11_RX_PWR_LOW_ALM = 151, /* RxPowerLowAlarm per lane */
	+ CMIS_P11_RX_PWR_HIGH_WARN = 152, /* RxPowerHighWarning per lane*/
	+ CMIS_P11_RX_PWR_LOW_WARN = 153, /* RxPowerLowWarning per lane */
	+
	+ /* Table 8-89: Lane-Specific Monitors (bytes 154-201) */
	+ CMIS_P11_TX_PWR_1 = 154, /* U16 Tx optical pwr, lane 1 */
	+ CMIS_P11_TX_PWR_2 = 156, /* (0.1 uW increments) */
	+ CMIS_P11_TX_PWR_3 = 158,
	+ CMIS_P11_TX_PWR_4 = 160,
	+ CMIS_P11_TX_PWR_5 = 162,
	+ CMIS_P11_TX_PWR_6 = 164,
	+ CMIS_P11_TX_PWR_7 = 166,
	+ CMIS_P11_TX_PWR_8 = 168,
	+ CMIS_P11_TX_BIAS_1 = 170, /* U16 Tx bias current, lane 1*/
	+ CMIS_P11_TX_BIAS_2 = 172, /* (2 uA increments) */
	+ CMIS_P11_TX_BIAS_3 = 174,
	+ CMIS_P11_TX_BIAS_4 = 176,
	+ CMIS_P11_TX_BIAS_5 = 178,
	+ CMIS_P11_TX_BIAS_6 = 180,
	+ CMIS_P11_TX_BIAS_7 = 182,
	+ CMIS_P11_TX_BIAS_8 = 184,
	+ CMIS_P11_RX_PWR_1 = 186, /* U16 Rx input power, lane 1 */
	+ CMIS_P11_RX_PWR_2 = 188, /* (0.1 uW increments) */
	+ CMIS_P11_RX_PWR_3 = 190,
	+ CMIS_P11_RX_PWR_4 = 192,
	+ CMIS_P11_RX_PWR_5 = 194,
	+ CMIS_P11_RX_PWR_6 = 196,
	+ CMIS_P11_RX_PWR_7 = 198,
	+ CMIS_P11_RX_PWR_8 = 200,
	+
	+ /* Table 8-90: Config Command Status (bytes 202-205) */
	+ CMIS_P11_CONFIG_STAT_12 = 202, /* ConfigStatus lanes 1-2 */
	+ CMIS_P11_CONFIG_STAT_34 = 203, /* ConfigStatus lanes 3-4 */
	+ CMIS_P11_CONFIG_STAT_56 = 204, /* ConfigStatus lanes 5-6 */
	+ CMIS_P11_CONFIG_STAT_78 = 205, /* ConfigStatus lanes 7-8 */
	+
	+ /* Table 8-93: Active Control Set (bytes 206-234) */
	+ CMIS_P11_ACS_DPCONFIG1 = 206, /* DPConfigLane1 (AppSel[7:4])*/
	+ CMIS_P11_ACS_DPCONFIG2 = 207, /* DPConfigLane2 */
	+ CMIS_P11_ACS_DPCONFIG3 = 208, /* DPConfigLane3 */
	+ CMIS_P11_ACS_DPCONFIG4 = 209, /* DPConfigLane4 */
	+ CMIS_P11_ACS_DPCONFIG5 = 210, /* DPConfigLane5 */
	+ CMIS_P11_ACS_DPCONFIG6 = 211, /* DPConfigLane6 */
	+ CMIS_P11_ACS_DPCONFIG7 = 212, /* DPConfigLane7 */
	+ CMIS_P11_ACS_DPCONFIG8 = 213, /* DPConfigLane8 */
	+ CMIS_P11_ACS_TX_START = 214, /* Provisioned Tx Controls */
	+ CMIS_P11_ACS_TX_END = 225,
	+ CMIS_P11_ACS_RX_START = 226, /* Provisioned Rx Controls */
	+ CMIS_P11_ACS_RX_END = 234,
	+
	+ /* Table 8-96: Data Path Conditions (bytes 235-239) */
	+ CMIS_P11_DP_COND_START = 235,
	+ CMIS_P11_DP_COND_END = 239,
	+
	+ /* Table 8-97: Media Lane Mapping (bytes 240-255) */
	+ CMIS_P11_MEDIA_MAP_START = 240,
	+ CMIS_P11_MEDIA_MAP_END = 255,
	+};
	+
	+/*
	+ * Per-lane bit positions for Page 11h flag/status registers.
	+ * Bytes 132-153 use bit N for lane N+1 (bit 7 = lane 8, bit 0 = lane 1).
	+ */
	+#define CMIS_LANE8 (1 << 7)
	+#define CMIS_LANE7 (1 << 6)
	+#define CMIS_LANE6 (1 << 5)
	+#define CMIS_LANE5 (1 << 4)
	+#define CMIS_LANE4 (1 << 3)
	+#define CMIS_LANE3 (1 << 2)
	+#define CMIS_LANE2 (1 << 1)
	+#define CMIS_LANE1 (1 << 0)
	+
	+/*
	+ * DPState encoding within bytes 128-131 (Table 8-83).
	+ * Each byte holds two 4-bit DPState fields:
	+ * bits 7:4 = even lane, bits 3:0 = odd lane.
	+ */
	+#define CMIS_DPSTATE_HI_MASK 0xF0 /* Upper nibble (even lane) */
	+#define CMIS_DPSTATE_HI_SHIFT 4
	+#define CMIS_DPSTATE_LO_MASK 0x0F /* Lower nibble (odd lane) */
	+
	+/* Table 8-84: Data Path State Encoding */
	+#define CMIS_DPSTATE_DEACTIVATED 1 /* DPDeactivated (or unused) */
	+#define CMIS_DPSTATE_INIT 2 /* DPInit */
	+#define CMIS_DPSTATE_DEINIT 3 /* DPDeinit */
	+#define CMIS_DPSTATE_ACTIVATED 4 /* DPActivated */
	+#define CMIS_DPSTATE_TXTURNON 5 /* DPTxTurnOn */
	+#define CMIS_DPSTATE_TXTURNOFF 6 /* DPTxTurnOff */
	+#define CMIS_DPSTATE_INITIALIZED 7 /* DPInitialized */
	+
	+/*
	+ * ConfigStatus encoding within bytes 202-205 (Table 8-90/91).
	+ * Each byte holds two 4-bit status fields, same nibble layout as DPState.
	+ */
	+#define CMIS_CFGSTAT_UNDEFINED 0x0 /* Undefined */
	+#define CMIS_CFGSTAT_SUCCESS 0x1 /* ConfigSuccess */
	+#define CMIS_CFGSTAT_REJECTED 0x2 /* ConfigRejected */
	+#define CMIS_CFGSTAT_REJECTEDINV 0x3 /* ConfigRejectedInvalidAppSel*/
	+#define CMIS_CFGSTAT_INPROGRESS 0x4 /* ConfigInProgress */
	+#define CMIS_CFGSTAT_REJECTEDLANE 0x5 /* ConfigRejectedInvalidLane */
	+#define CMIS_CFGSTAT_REJECTEDEQ 0x6 /* ConfigRejectedInvalidEq */
	+
	+/* DPConfigLane (CMIS_P11_ACS_DPCONFIGn) bit definitions (Table 8-92/93) */
	+#define CMIS_ACS_APPSEL_MASK 0xF0 /* AppSel code, bits 7:4 */
	+#define CMIS_ACS_APPSEL_SHIFT 4
	+#define CMIS_ACS_DATAPATH_MASK 0x0F /* DataPathID, bits 3:0 */
	+
	+/*
	+ * Page 00h bit definitions
	+ */
	+
	+/* Byte 200 (CMIS_P0_MOD_POWER) bit definitions (Table 8-31) */
	+#define CMIS_POWER_CLASS_MASK 0xE0 /* ModulePowerClass, bits 7:5 */
	+#define CMIS_POWER_CLASS_SHIFT 5
	+#define CMIS_POWER_CLASS_1 0 /* <=1.5W */
	+#define CMIS_POWER_CLASS_2 1 /* <=3.5W */
	+#define CMIS_POWER_CLASS_3 2 /* <=7.0W */
	+#define CMIS_POWER_CLASS_4 3 /* <=8.0W */
	+#define CMIS_POWER_CLASS_5 4 /* <=10.0W */
	+#define CMIS_POWER_CLASS_6 5 /* <=12.0W */
	+#define CMIS_POWER_CLASS_7 6 /* <=14.0W */
	+#define CMIS_POWER_CLASS_8 7 /* >14.0W, see MaxPower byte */
	+#define CMIS_POWER_MAX_IN_BYTE (1 << 4) /* MaxPowerOverride: byte 201*/
	+
	+/* Byte 202 (CMIS_P0_CABLE_LEN) bit definitions (Table 8-32) */
	+#define CMIS_CABLE_LEN_MULT_MASK 0xC0 /* LengthMultiplier, bits 7:6 */
	+#define CMIS_CABLE_LEN_MULT_SHIFT 6
	+#define CMIS_CABLE_LEN_VAL_MASK 0x3F /* Length value, bits 5:0 */
	+#define CMIS_CABLE_LEN_MULT_01 0 /* x 0.1m */
	+#define CMIS_CABLE_LEN_MULT_1 1 /* x 1m */
	+#define CMIS_CABLE_LEN_MULT_10 2 /* x 10m */
	+#define CMIS_CABLE_LEN_MULT_100 3 /* x 100m */
	+
	+/* Lane monitor stride (each monitor is U16 = 2 bytes per lane) */
	+#define CMIS_LANE_MON_SIZE 2
	+#define CMIS_MAX_LANES 8
	+
	+#endif /* !_NET_CMIS_H_ */

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