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Index: sys/mips/broadcom/bcm_mips.c
===================================================================
--- sys/mips/broadcom/bcm_mips.c
+++ sys/mips/broadcom/bcm_mips.c
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
+ * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,41 +34,38 @@
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
-#include <sys/systm.h>
-#include <sys/errno.h>
-#include <sys/rman.h>
-#include <sys/stddef.h>
#include <machine/bus.h>
+#include <sys/rman.h>
#include <machine/resource.h>
#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bhndvar.h>
-#include <dev/bhnd/bhnd_ids.h>
-#include "bcm_mipscore.h"
+/*
+ * BMIPS32 and BMIPS3300 core driver.
+ *
+ * These cores are only found on siba(4) chipsets, allowing
+ * us to assume the availability of siba interrupt registers.
+ */
-static const struct resource_spec mipscore_rspec[MIPSCORE_MAX_RSPEC] = {
- { SYS_RES_MEMORY, 0, RF_ACTIVE },
- { -1, -1, 0 }
+static const struct bhnd_device bcm_mips_devs[] = {
+ BHND_DEVICE(BCM, MIPS33, NULL, NULL, BHND_DF_SOC),
+ BHND_DEVICE_END
};
-#define MIPSCORE_DEV(_vendor, _core) \
- BHND_DEVICE(_vendor, _core, NULL, NULL, BHND_DF_SOC)
-
-struct bhnd_device mipscore_match[] = {
- MIPSCORE_DEV(BCM, MIPS),
- MIPSCORE_DEV(BCM, MIPS33),
- MIPSCORE_DEV(MIPS, MIPS74K),
- BHND_DEVICE_END
+struct bcm_mips_softc {
+ device_t dev;
+ struct resource *mem_res;
+ int mem_rid;
};
static int
-mipscore_probe(device_t dev)
+bcm_mips_probe(device_t dev)
{
- const struct bhnd_device *id;
+ const struct bhnd_device *id;
- id = bhnd_device_lookup(dev, mipscore_match, sizeof(mipscore_match[0]));
+ id = bhnd_device_lookup(dev, bcm_mips_devs,
+ sizeof(bcm_mips_devs[0]));
if (id == NULL)
return (ENXIO);
@@ -77,50 +74,48 @@
}
static int
-mipscore_attach(device_t dev)
+bcm_mips_attach(device_t dev)
{
- struct mipscore_softc *sc;
- struct resource *res;
- uint32_t intmask;
- uint16_t devid;
- int error;
+ struct bcm_mips_softc *sc;
sc = device_get_softc(dev);
- devid = bhnd_get_device(dev);
-
- sc->devid = devid;
sc->dev = dev;
/* Allocate bus resources */
- memcpy(sc->rspec, mipscore_rspec, sizeof(sc->rspec));
- error = bhnd_alloc_resources(dev, sc->rspec, sc->res);
- if (error)
- return (error);
-
- res = sc->res[0]->res;
- if (res == NULL)
+ sc->mem_rid = 0;
+ sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
+ RF_ACTIVE);
+ if (sc->mem_res == NULL)
return (ENXIO);
- if (devid == BHND_COREID_MIPS74K) {
- intmask = (1 << 31);
- /* Use intmask5 register to route the timer interrupt */
- bus_write_4(res, offsetof(struct mipscore_regs, intmask[5]),
- intmask);
- }
+ return (0);
+}
+
+static int
+bcm_mips_detach(device_t dev)
+{
+ struct bcm_mips_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res);
return (0);
}
-static device_method_t mipscore_methods[] = {
- DEVMETHOD(device_probe, mipscore_probe),
- DEVMETHOD(device_attach, mipscore_attach),
- DEVMETHOD_END
+static device_method_t bcm_mips_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, bcm_mips_probe),
+ DEVMETHOD(device_attach, bcm_mips_attach),
+ DEVMETHOD(device_detach, bcm_mips_detach),
+
+ DEVMETHOD_END
};
-devclass_t bhnd_mipscore_devclass;
+static devclass_t bcm_mips_devclass;
+
+DEFINE_CLASS_0(bcm_mips, bcm_mips_driver, bcm_mips_methods, sizeof(struct bcm_mips_softc));
+EARLY_DRIVER_MODULE(bhnd_mips, bhnd, bcm_mips_driver, bcm_mips_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_EARLY);
-DEFINE_CLASS_0(bhnd_mips, mipscore_driver, mipscore_methods,
- sizeof(struct mipscore_softc));
-EARLY_DRIVER_MODULE(bhnd_mips, bhnd, mipscore_driver,
- bhnd_mipscore_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_EARLY);
-MODULE_VERSION(bhnd_mips, 1);
+MODULE_VERSION(bcm_mips, 1);
+MODULE_DEPEND(bcm_mips, bhnd, 1, 1, 1);
Index: sys/mips/broadcom/bcm_mips74k.c
===================================================================
--- sys/mips/broadcom/bcm_mips74k.c
+++ sys/mips/broadcom/bcm_mips74k.c
@@ -1,5 +1,6 @@
/*-
* Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
+ * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,41 +35,40 @@
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
-#include <sys/systm.h>
-#include <sys/errno.h>
-#include <sys/rman.h>
-#include <sys/stddef.h>
#include <machine/bus.h>
+#include <sys/rman.h>
#include <machine/resource.h>
#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bhndvar.h>
-#include <dev/bhnd/bhnd_ids.h>
-#include "bcm_mipscore.h"
+#include "bcm_mips74kreg.h"
-static const struct resource_spec mipscore_rspec[MIPSCORE_MAX_RSPEC] = {
- { SYS_RES_MEMORY, 0, RF_ACTIVE },
- { -1, -1, 0 }
-};
-
-#define MIPSCORE_DEV(_vendor, _core) \
- BHND_DEVICE(_vendor, _core, NULL, NULL, BHND_DF_SOC)
+/*
+ * BMIPS74K Core
+ *
+ * These cores are only found on bcma(4) chipsets, allowing
+ * us to assume the availability of bcma interrupt registers.
+ */
-struct bhnd_device mipscore_match[] = {
- MIPSCORE_DEV(BCM, MIPS),
- MIPSCORE_DEV(BCM, MIPS33),
- MIPSCORE_DEV(MIPS, MIPS74K),
+static const struct bhnd_device bcm_mips74k_devs[] = {
+ BHND_DEVICE(MIPS, MIPS74K, NULL, NULL, BHND_DF_SOC),
BHND_DEVICE_END
};
+struct bcm_mips74k_softc {
+ device_t dev;
+ struct resource *mem_res;
+ int mem_rid;
+};
+
static int
-mipscore_probe(device_t dev)
+bcm_mips74k_probe(device_t dev)
{
- const struct bhnd_device *id;
+ const struct bhnd_device *id;
- id = bhnd_device_lookup(dev, mipscore_match, sizeof(mipscore_match[0]));
+ id = bhnd_device_lookup(dev, bcm_mips74k_devs,
+ sizeof(bcm_mips74k_devs[0]));
if (id == NULL)
return (ENXIO);
@@ -77,50 +77,51 @@
}
static int
-mipscore_attach(device_t dev)
+bcm_mips74k_attach(device_t dev)
{
- struct mipscore_softc *sc;
- struct resource *res;
- uint32_t intmask;
- uint16_t devid;
- int error;
+ struct bcm_mips74k_softc *sc;
sc = device_get_softc(dev);
- devid = bhnd_get_device(dev);
-
- sc->devid = devid;
sc->dev = dev;
/* Allocate bus resources */
- memcpy(sc->rspec, mipscore_rspec, sizeof(sc->rspec));
- error = bhnd_alloc_resources(dev, sc->rspec, sc->res);
- if (error)
- return (error);
-
- res = sc->res[0]->res;
- if (res == NULL)
+ sc->mem_rid = 0;
+ sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
+ RF_ACTIVE);
+ if (sc->mem_res == NULL)
return (ENXIO);
- if (devid == BHND_COREID_MIPS74K) {
- intmask = (1 << 31);
- /* Use intmask5 register to route the timer interrupt */
- bus_write_4(res, offsetof(struct mipscore_regs, intmask[5]),
- intmask);
- }
+ /* Route MIPS timer to IRQ5 */
+ bus_write_4(sc->mem_res, BCM_MIPS74K_INTR5_SEL,
+ (1<<BCM_MIPS74K_TIMER_IVEC));
+
+ return (0);
+}
+
+static int
+bcm_mips74k_detach(device_t dev)
+{
+ struct bcm_mips74k_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res);
return (0);
}
-static device_method_t mipscore_methods[] = {
- DEVMETHOD(device_probe, mipscore_probe),
- DEVMETHOD(device_attach, mipscore_attach),
- DEVMETHOD_END
+static device_method_t bcm_mips74k_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, bcm_mips74k_probe),
+ DEVMETHOD(device_attach, bcm_mips74k_attach),
+ DEVMETHOD(device_detach, bcm_mips74k_detach),
+
+ DEVMETHOD_END
};
-devclass_t bhnd_mipscore_devclass;
+static devclass_t bcm_mips_devclass;
-DEFINE_CLASS_0(bhnd_mips, mipscore_driver, mipscore_methods,
- sizeof(struct mipscore_softc));
-EARLY_DRIVER_MODULE(bhnd_mips, bhnd, mipscore_driver,
- bhnd_mipscore_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_EARLY);
-MODULE_VERSION(bhnd_mips, 1);
+DEFINE_CLASS_0(bcm_mips, bcm_mips74k_driver, bcm_mips74k_methods, sizeof(struct bcm_mips74k_softc));
+EARLY_DRIVER_MODULE(bcm_mips74k, bhnd, bcm_mips74k_driver, bcm_mips_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_EARLY);
+MODULE_VERSION(bcm_mips74k, 1);
+MODULE_DEPEND(bcm_mips74k, bhnd, 1, 1, 1);
Index: sys/mips/broadcom/bcm_mips74kreg.h
===================================================================
--- sys/mips/broadcom/bcm_mips74kreg.h
+++ sys/mips/broadcom/bcm_mips74kreg.h
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
+ * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -25,36 +25,38 @@
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
+ *
+ * $FreeBSD$
*/
-#ifndef _BHND_CORES_MIPS_MIPSCOREVAR_H_
-#define _BHND_CORES_MIPS_MIPSCOREVAR_H_
-
-#define MIPSCORE_MAX_RSPEC 2
-
-struct mipscore_softc {
- device_t dev; /* CPU device */
- uint32_t devid;
- struct resource_spec rspec[MIPSCORE_MAX_RSPEC];
- struct bhnd_resource *res[MIPSCORE_MAX_RSPEC];
-};
-
-struct mipscore_regs {
- uint32_t corecontrol;
- uint32_t exceptionbase;
- uint32_t PAD1[1]; /* unmapped address */
- uint32_t biststatus;
- uint32_t intstatus;
- uint32_t intmask[6];
- uint32_t nmimask;
- uint32_t PAD2[4]; /* unmapped addresses */
- uint32_t gpioselect;
- uint32_t gpiooutput;
- uint32_t gpioenable;
- uint32_t PAD3[101]; /* unmapped addresses */
- uint32_t clkcontrolstatus;
-};
-
-#endif /* _BHND_CORES_MIPS_MIPSCOREVAR_H_ */
+#ifndef _MIPS_BROADCOM_MIPS74KREG_H_
+#define _MIPS_BROADCOM_MIPS74KREG_H_
+
+#define BCM_MIPS74K_CORECTL 0x00 /**< core control */
+#define BCM_MIPS74K_EXCBASE 0x04 /**< exception base */
+
+#define BCM_MIPS74K_BIST_STATUS 0x0C /**< built-in self-test status */
+#define BCM_MIPS74K_INTR_STATUS 0x10 /**< interrupt status */
+
+/* INTR(0-5)_MASK map bcma(4) OOB interrupt bus lines to MIPS hardware
+ * interrupts. */
+#define BCM_MIPS74K_INTR0_SEL 0x14 /**< IRQ0 OOBSEL mask */
+#define BCM_MIPS74K_INTR1_SEL 0x18 /**< IRQ1 OOBSEL mask */
+#define BCM_MIPS74K_INTR2_SEL 0x1C /**< IRQ2 OOBSEL mask */
+#define BCM_MIPS74K_INTR3_SEL 0x20 /**< IRQ3 OOBSEL mask */
+#define BCM_MIPS74K_INTR4_SEL 0x24 /**< IRQ4 OOBSEL mask */
+#define BCM_MIPS74K_INTR5_SEL 0x28 /**< IRQ5 OOBSEL mask */
+
+#define BCM_MIPS74K_INTR_SEL(_intr) \
+ (BCM_MIPS74K_INTR0_SEL + ((_intr) * 4))
+
+#define BCM_MIPS74K_NMI_MASK 0x2C /**< nmi mask */
+
+#define BCM_MIPS74K_GPIO_SEL 0x40 /**< gpio select */
+#define BCM_MIPS74K_GPIO_OUT 0x44 /**< gpio output enable */
+#define BCM_MIPS74K_GPIO_EN 0x48 /**< gpio enable */
+
+
+#define BCM_MIPS74K_TIMER_IVEC 31 /**< MIPS timer OOBSEL value */
+
+#endif /* _MIPS_BROADCOM_MIPS74KREG_H_ */
Index: sys/mips/broadcom/bcm_mipsreg.h
===================================================================
--- /dev/null
+++ sys/mips/broadcom/bcm_mipsreg.h
@@ -0,0 +1,73 @@
+/*-
+ * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
+ * redistribution must be conditioned upon including a substantially
+ * similar Disclaimer requirement for further binary redistribution.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGES.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MIPS_BROADCOM_MIPSREG_H_
+#define _MIPS_BROADCOM_MIPSREG_H_
+
+/*
+ * Common BMIPS32/BMIPS3300 Registers
+ */
+#define BCM_BMIPS_CORECTL 0x00 /**< core control */
+#define BCM_BMIPS_CORECTL_FORCE_RST 0x01 /**< force reset */
+#define BCM_BMIPS_CORECTL_NO_FLSH_EXC 0x02 /**< flash exception disable */
+#define BCM_BMIPS_INTR_STATUS 0x20 /**< interrupt status */
+#define BCM_BMIPS_INTR_MASK 0x24 /**< interrupt mask */
+#define BCM_BMIPS_TIMER_INTMASK 0x01 /**< timer interrupt mask */
+#define BCM_BMIPS_TIMER_CTRL 0x28 /**< timer interval (?) */
+
+/*
+ * Broadcom BMIPS32 (BHND_COREID_MIPS)
+ */
+
+#define BCM_BMIPS32_CORECTL BCM_BMIPS_CORECTL
+#define BCM_BMIPS32_BIST_STATUS 0x04 /**< built-in self-test status */
+#define BCM_BMIPS32_INTR_STATUS BCM_BMIPS_INTR_STATUS
+#define BCM_BMIPS32_INTR_MASK BCM_BMIPS_INTR_MASK
+#define BCM_BMIPS32_TIMER_CTRL BCM_BMIPS_TIMER_CTRL
+
+/*
+ * Broadcom BMIPS3300+ (BHND_COREID_MIPS33)
+ */
+
+#define BCM_BMIPS33_CORECTL BCM_BMIPS_CORECTL
+#define BCM_BMIPS33_BIST_CTRL 0x04 /**< build-in self-test control */
+#define BCM_BMIPS33_BIST_CTRL_DUMP 0x01 /**< BIST dump */
+#define BCM_BMIPS33_BIST_CTRL_DEBUG 0x02 /**< BIST debug */
+#define BCM_BMIPS33_BIST_CTRL_HOLD 0x04 /**< BIST hold */
+#define BCM_BMIPS33_BIST_STATUS 0x08 /**< built-in self-test status */
+#define BCM_BMIPS33_INTR_STATUS BCM_BMIPS_INTR_STATUS
+#define BCM_BMIPS33_INTR_MASK BCM_BMIPS_INTR_MASK
+#define BCM_BMIPS33_TIMER_CTRL BCM_BMIPS_TIMER_CTRL
+#define BCM_BMIPS33_TEST_MUX_SEL 0x30 /**< test multiplexer select (?) */
+#define BCM_BMIPS33_TEST_MUX_EN 0x34 /**< test multiplexer enable (?) */
+#define BCM_BMIPS33_EJTAG_GPIO_EN 0x2C /**< ejtag gpio enable */
+
+#endif /* _MIPS_BROADCOM_MIPSREG_H_ */
Index: sys/mips/broadcom/files.broadcom
===================================================================
--- sys/mips/broadcom/files.broadcom
+++ sys/mips/broadcom/files.broadcom
@@ -5,6 +5,8 @@
# which are believed to be devices we have drivers for
# which just need to be tweaked for attachment to an BHND system bus.
mips/broadcom/bcm_machdep.c standard
+mips/broadcom/bcm_mips.c optional siba_nexus siba
+mips/broadcom/bcm_mips74k.c optional bcma_nexus bcma
mips/broadcom/bcm_pmu.c standard
mips/mips/tick.c standard
mips/mips/mips_pic.c standard
@@ -15,7 +17,6 @@
mips/broadcom/uart_cpu_chipc.c optional uart
mips/broadcom/uart_bus_chipc.c optional uart
-mips/broadcom/bcm_mipscore.c standard
# TODO: Replace with BCM47xx/57xx/etc-aware geom_map
geom/geom_flashmap.c standard

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