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Index: sys/powerpc/include/facility.h
===================================================================
--- /dev/null
+++ sys/powerpc/include/facility.h
@@ -0,0 +1,54 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2018 Breno Leitao
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_FACILITY_H_
+#define _MACHINE_FACILITY_H_ 1
+
+#define FACILITY_IC_MASK 0xFF00000000000000ULL /* FSCR[0:7] is Interrupt Cause */
+
+#define FACILITY_IC_FP 0x0000000000000000ULL /* FP unavailable */
+#define FACILITY_IC_VSX 0x0100000000000000ULL /* VSX unavailable */
+#define FACILITY_IC_DSCR 0x0200000000000000ULL /* Access to the DSCR at SPRs 3 or 17 */
+#define FACILITY_IC_PM 0x0300000000000000ULL /* Read or write access of a Performance Monitor SPR in group A */
+#define FACILITY_IC_BHRB 0x0400000000000000ULL /* Execution of a BHRB Instruction */
+#define FACILITY_IC_HTM 0x0500000000000000ULL /* Access to a Transactional Memory */
+/* Reserved 0x0500000000000000ULL */
+#define FACILITY_IC_EBB 0x0700000000000000ULL /* Access to Event-Based Branch */
+#define FACILITY_IC_TAR 0x0800000000000000ULL /* Access to Target Address Register */
+#define FACILITY_IC_STOP 0x0900000000000000ULL /* Access to the 'stop' instruction in privileged non-hypervisor state */
+#define FACILITY_IC_MSG 0x0A00000000000000ULL /* Access to 'msgsndp' or 'msgclrp' instructions */
+#define FACILITY_IC_SCV 0x0C00000000000000ULL /* Execution of a 'scv' instruction */
+
+
+/* _MACHINE_FACILITY_H_ */
+#endif
Index: sys/powerpc/include/spr.h
===================================================================
--- sys/powerpc/include/spr.h
+++ sys/powerpc/include/spr.h
@@ -120,6 +120,7 @@
#define SPR_EIE 0x050 /* ..8 Exception Interrupt ??? */
#define SPR_EID 0x051 /* ..8 Exception Interrupt ??? */
#define SPR_NRI 0x052 /* ..8 Exception Interrupt ??? */
+#define SPR_FSCR 0x099 /* Facility Status and Control Register */
#define SPR_USPRG0 0x100 /* 4.. User SPR General 0 */
#define SPR_VRSAVE 0x100 /* .6. AltiVec VRSAVE */
#define SPR_SPRG0 0x110 /* 468 SPR General 0 */
Index: sys/powerpc/powerpc/trap.c
===================================================================
--- sys/powerpc/powerpc/trap.c
+++ sys/powerpc/powerpc/trap.c
@@ -72,6 +72,7 @@
#include <machine/trap.h>
#include <machine/spr.h>
#include <machine/sr.h>
+#include <machine/facility.h>
/* Below matches setjmp.S */
#define FAULTBUF_LR 21
@@ -204,6 +205,7 @@
int sig, type, user;
u_int ucode;
ksiginfo_t ksi;
+ register_t fscr;
VM_CNT_INC(v_trap);
@@ -294,6 +296,10 @@
break;
case EXC_FAC:
+ fscr = mfspr(SPR_FSCR);
+ if ((fscr & FACILITY_IC_MASK) == FACILITY_IC_HTM) {
+ CTR0(KTR_TRAP, "Hardware Transactional Memory subsystem disabled");
+ }
case EXC_HEA:
sig = SIGILL;
ucode = ILL_ILLOPC;

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