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D4792.id13151.diff
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Index: sys/arm/allwinner/a10_clk.c
===================================================================
--- sys/arm/allwinner/a10_clk.c
+++ sys/arm/allwinner/a10_clk.c
@@ -109,7 +109,8 @@
static devclass_t a10_ccm_devclass;
-DRIVER_MODULE(a10_ccm, simplebus, a10_ccm_driver, a10_ccm_devclass, 0, 0);
+EARLY_DRIVER_MODULE(a10_ccm, simplebus, a10_ccm_driver, a10_ccm_devclass, 0, 0,
+ BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
int
a10_clk_usb_activate(void)
@@ -200,7 +201,7 @@
/* Set GMAC mode. */
reg_value = CCM_GMAC_CLK_MII;
- if (OF_getprop_alloc(node, "phy-type", 1, (void **)&phy_type) > 0) {
+ if (OF_getprop_alloc(node, "phy-mode", 1, (void **)&phy_type) > 0) {
if (strcasecmp(phy_type, "rgmii") == 0)
reg_value = CCM_GMAC_CLK_RGMII | CCM_GMAC_MODE_RGMII;
else if (strcasecmp(phy_type, "rgmii-bpi") == 0) {
Index: sys/arm/allwinner/a10_common.c
===================================================================
--- sys/arm/allwinner/a10_common.c
+++ sys/arm/allwinner/a10_common.c
@@ -50,7 +50,7 @@
{
int offset;
- if (fdt_is_compatible(node, "allwinner,sun4i-ic"))
+ if (fdt_is_compatible(node, "allwinner,sun4i-a10-ic"))
offset = 0;
else if (fdt_is_compatible(node, "arm,gic"))
offset = 32;
Index: sys/arm/allwinner/a10_ehci.c
===================================================================
--- sys/arm/allwinner/a10_ehci.c
+++ sys/arm/allwinner/a10_ehci.c
@@ -43,10 +43,10 @@
#include <sys/gpio.h>
#include <machine/bus.h>
-#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
-#include <dev/usb/usb.h>
+#include <dev/usb/usb.h>
#include <dev/usb/usbdi.h>
#include <dev/usb/usb_core.h>
@@ -90,6 +90,12 @@
bs_r_1_proto(reversed);
bs_w_1_proto(reversed);
+static struct ofw_compat_data compat_data[] = {
+ {"allwinner,sun4i-a10-ehci", 1},
+ {"allwinner,sun7i-a20-ehci", 1},
+ {NULL, 0}
+};
+
static int
a10_ehci_probe(device_t self)
{
@@ -97,7 +103,7 @@
if (!ofw_bus_status_okay(self))
return (ENXIO);
- if (!ofw_bus_is_compatible(self, "allwinner,usb-ehci"))
+ if (ofw_bus_search_compatible(self, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(self, EHCI_HC_DEVSTR);
Index: sys/arm/allwinner/a10_gpio.c
===================================================================
--- sys/arm/allwinner/a10_gpio.c
+++ sys/arm/allwinner/a10_gpio.c
@@ -73,6 +73,12 @@
#define A10_GPIO_INPUT 0
#define A10_GPIO_OUTPUT 1
+static struct ofw_compat_data compat_data[] = {
+ {"allwinner,sun4i-a10-pinctrl", 1},
+ {"allwinner,sun7i-a20-pinctrl", 1},
+ {NULL, 0}
+};
+
struct a10_gpio_softc {
device_t sc_dev;
device_t sc_busdev;
@@ -373,7 +379,7 @@
if (!ofw_bus_status_okay(dev))
return (ENXIO);
- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-gpio"))
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "Allwinner GPIO controller");
@@ -493,7 +499,9 @@
sizeof(struct a10_gpio_softc),
};
-DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0);
+EARLY_DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0,
+ BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
+
int
a10_gpio_ethernet_activate(uint32_t func)
Index: sys/arm/allwinner/a10_mmc.c
===================================================================
--- sys/arm/allwinner/a10_mmc.c
+++ sys/arm/allwinner/a10_mmc.c
@@ -62,6 +62,12 @@
TUNABLE_INT("hw.a10.mmc.pio_mode", &a10_mmc_pio_mode);
+static struct ofw_compat_data compat_data[] = {
+ {"allwinner,sun4i-a10-mmc", 1},
+ {"allwinner,sun5i-a13-mmc", 1},
+ {NULL, 0}
+};
+
struct a10_mmc_softc {
bus_space_handle_t a10_bsh;
bus_space_tag_t a10_bst;
@@ -123,8 +129,9 @@
if (!ofw_bus_status_okay(dev))
return (ENXIO);
- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-mmc"))
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
+
device_set_desc(dev, "Allwinner Integrated MMC/SD controller");
return (BUS_PROBE_DEFAULT);
Index: sys/arm/allwinner/a10_wdog.c
===================================================================
--- sys/arm/allwinner/a10_wdog.c
+++ sys/arm/allwinner/a10_wdog.c
@@ -95,7 +95,7 @@
if (!ofw_bus_status_okay(dev))
return (ENXIO);
- if (ofw_bus_is_compatible(dev, "allwinner,sun4i-wdt")) {
+ if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-wdt")) {
device_set_desc(dev, "Allwinner A10 Watchdog");
return (BUS_PROBE_DEFAULT);
}
Index: sys/arm/allwinner/a20/a20_cpu_cfg.c
===================================================================
--- sys/arm/allwinner/a20/a20_cpu_cfg.c
+++ sys/arm/allwinner/a20/a20_cpu_cfg.c
@@ -117,7 +117,8 @@
static devclass_t a20_cpu_cfg_devclass;
-DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, a20_cpu_cfg_devclass, 0, 0);
+EARLY_DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, a20_cpu_cfg_devclass, 0, 0,
+ BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
uint64_t
a20_read_counter64(void)
Index: sys/arm/allwinner/aintc.c
===================================================================
--- sys/arm/allwinner/aintc.c
+++ sys/arm/allwinner/aintc.c
@@ -79,6 +79,12 @@
#define SW_INT_ENABLE_REG(_b) (0x40 + ((_b) * 4))
#define SW_INT_MASK_REG(_b) (0x50 + ((_b) * 4))
+static struct ofw_compat_data compat_data[] = {
+ {"allwinner,sun4i-a10-ic", 1},
+ {"allwinner,sun7i-a20-sc-nmi", 1},
+ {NULL, 0}
+};
+
struct a10_aintc_softc {
device_t sc_dev;
struct resource * aintc_res;
@@ -101,7 +107,7 @@
if (!ofw_bus_status_okay(dev))
return (ENXIO);
- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-ic"))
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "A10 AINTC Interrupt Controller");
return (BUS_PROBE_DEFAULT);
@@ -158,7 +164,8 @@
static devclass_t a10_aintc_devclass;
-DRIVER_MODULE(aintc, simplebus, a10_aintc_driver, a10_aintc_devclass, 0, 0);
+EARLY_DRIVER_MODULE(aintc, simplebus, a10_aintc_driver, a10_aintc_devclass, 0, 0,
+ BUS_PASS_INTERRUPT + BUS_PASS_ORDER_FIRST);
int
arm_get_next_irq(int last_irq)
Index: sys/arm/allwinner/allwinner_machdep.h
===================================================================
--- sys/arm/allwinner/allwinner_machdep.h
+++ sys/arm/allwinner/allwinner_machdep.h
@@ -2,8 +2,6 @@
* Copyright (c) 2015 Emmanuel Vadot <manu@bidouilliste.com>
* All rights reserved.
*
- * This code is derived from software written for Brini by Mark Brinicombe
- *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -31,17 +29,17 @@
#ifndef AW_MACHDEP_H
#define AW_MACHDEP_H
-
+
#define ALLWINNERSOC_A10 0x10000000
#define ALLWINNERSOC_A13 0x13000000
#define ALLWINNERSOC_A10S 0x10000001
#define ALLWINNERSOC_A20 0x20000000
-
+
#define ALLWINNERSOC_SUN4I 0x40000000
#define ALLWINNERSOC_SUN5I 0x50000000
#define ALLWINNERSOC_SUN7I 0x70000000
-
+
u_int allwinner_soc_type(void);
u_int allwinner_soc_family(void);
-
+
#endif /* AW_MACHDEP_H */
Index: sys/arm/allwinner/allwinner_machdep.c
===================================================================
--- sys/arm/allwinner/allwinner_machdep.c
+++ sys/arm/allwinner/allwinner_machdep.c
@@ -63,6 +63,7 @@
{
soc_type = ALLWINNERSOC_A10;
soc_family = ALLWINNERSOC_SUN4I;
+
return (0);
}
Index: sys/arm/allwinner/files.a10
===================================================================
--- sys/arm/allwinner/files.a10
+++ sys/arm/allwinner/files.a10
@@ -1,3 +1,4 @@
# $FreeBSD$
arm/allwinner/aintc.c standard
+arm/allwinner/timer.c standard
Index: sys/arm/allwinner/files.allwinner
===================================================================
--- sys/arm/allwinner/files.allwinner
+++ sys/arm/allwinner/files.allwinner
@@ -12,5 +12,4 @@
arm/allwinner/a20/a20_cpu_cfg.c standard
arm/allwinner/allwinner_machdep.c standard
arm/allwinner/if_emac.c optional emac
-arm/allwinner/timer.c standard
#arm/allwinner/console.c standard
Index: sys/arm/allwinner/if_emac.c
===================================================================
--- sys/arm/allwinner/if_emac.c
+++ sys/arm/allwinner/if_emac.c
@@ -756,7 +756,7 @@
emac_probe(device_t dev)
{
- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-emac"))
+ if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-emac"))
return (ENXIO);
device_set_desc(dev, "A10/A20 EMAC ethernet controller");
Index: sys/arm/allwinner/timer.c
===================================================================
--- sys/arm/allwinner/timer.c
+++ sys/arm/allwinner/timer.c
@@ -50,7 +50,7 @@
#include <sys/kdb.h>
-#include "a20/a20_cpu_cfg.h"
+#include <arm/allwinner/allwinner_machdep.h>
/**
* Timer registers addr
@@ -84,7 +84,6 @@
uint32_t sc_period;
uint32_t timer0_freq;
struct eventtimer et;
- uint8_t sc_timer_type; /* 0 for A10, 1 for A20 */
};
int a10_timer_get_timerfreq(struct a10_timer_softc *);
@@ -127,10 +126,6 @@
{
uint32_t lo, hi;
- /* In case of A20 get appropriate counter info */
- if (a10_timer_sc->sc_timer_type)
- return (a20_read_counter64());
-
/* Latch counter, wait for it to be ready to read. */
timer_write_4(a10_timer_sc, CNT64_CTRL_REG, CNT64_RL_EN);
while (timer_read_4(a10_timer_sc, CNT64_CTRL_REG) & CNT64_RL_EN)
@@ -146,13 +141,16 @@
a10_timer_probe(device_t dev)
{
struct a10_timer_softc *sc;
+ u_int soc_family;
sc = device_get_softc(dev);
- if (ofw_bus_is_compatible(dev, "allwinner,sun4i-timer"))
- sc->sc_timer_type = 0;
- else if (ofw_bus_is_compatible(dev, "allwinner,sun7i-timer"))
- sc->sc_timer_type = 1;
+ soc_family = allwinner_soc_family();
+ if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-timer")) {
+ if (soc_family != ALLWINNERSOC_SUN4I &&
+ soc_family != ALLWINNERSOC_SUN5I)
+ return (ENXIO);
+ }
else
return (ENXIO);
@@ -352,7 +350,8 @@
static devclass_t a10_timer_devclass;
-DRIVER_MODULE(a10_timer, simplebus, a10_timer_driver, a10_timer_devclass, 0, 0);
+EARLY_DRIVER_MODULE(a10_timer, simplebus, a10_timer_driver, a10_timer_devclass, 0, 0,
+ BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
void
DELAY(int usec)
Index: sys/arm/conf/A10
===================================================================
--- sys/arm/conf/A10
+++ sys/arm/conf/A10
@@ -1,5 +1,5 @@
#
-# A20 -- Custom configuration for the Allwinner A20 ARM SoC
+# A10 -- Custom configuration for the AllWinner A10 SoC
#
# For more information on this file, please read the config(5) manual page,
# and/or the handbook section on Kernel Configuration Files:
@@ -18,16 +18,13 @@
#
# $FreeBSD$
-ident A20
+ident A10
include "std.armv6"
-include "../allwinner/a20/std.a20"
-
-options ARM_INTRNG
+include "../allwinner/std.a10"
options HZ=100
-options SCHED_ULE # ULE scheduler
-options SMP # Enable multiple cores
+options SCHED_4BSD # 4BSD scheduler
options PLATFORM
# Debugging for use in -current
@@ -50,13 +47,10 @@
#options BOOTP_NFSROOT
#options BOOTP_COMPAT
#options BOOTP_NFSV3
-#options BOOTP_WIRED_TO=dwc0
+#options BOOTP_WIRED_TO=emac0
# Boot device is 2nd slice on MMC/SD card
-options ROOTDEVNAME=\"ufs:/dev/da0s2\"
-
-# Interrupt controller
-device gic
+options ROOTDEVNAME=\"ufs:/dev/mmcsd0s2\"
# MMC/SD/SDIO Card slot support
device mmc # mmc/sd bus
@@ -104,8 +98,7 @@
device mii
device bpf
-#device emac # 10/100 integrated EMAC controller
-device dwc # 10/100/1000 integrated GMAC controller
+device emac
# USB ethernet support, requires miibus
device miibus
Index: sys/arm/conf/A20
===================================================================
--- sys/arm/conf/A20
+++ sys/arm/conf/A20
@@ -58,6 +58,9 @@
# Interrupt controller
device gic
+# ARM Generic Timer
+device generic_timer
+
# MMC/SD/SDIO Card slot support
device mmc # mmc/sd bus
device mmcsd # mmc/sd flash cards
Index: sys/boot/fdt/dts/arm/bananapi.dts
===================================================================
--- sys/boot/fdt/dts/arm/bananapi.dts
+++ sys/boot/fdt/dts/arm/bananapi.dts
@@ -28,7 +28,8 @@
/dts-v1/;
-/include/ "sun7i-a20.dtsi"
+#include "sun7i-a20.dtsi"
+
#include <dt-bindings/gpio/gpio.h>
@@ -65,7 +66,7 @@
};
gmac@01c50000 {
- phy-type = "rgmii-bpi";
+ phy-mode = "rgmii-bpi";
status = "okay";
};
Index: sys/boot/fdt/dts/arm/cubieboard2.dts
===================================================================
--- sys/boot/fdt/dts/arm/cubieboard2.dts
+++ sys/boot/fdt/dts/arm/cubieboard2.dts
@@ -1,5 +1,6 @@
/*-
* Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
+ * Copyright (c) 2016 Emmanuel Vadot <manu@bidouilliste.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -22,78 +23,19 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
- *
+ *
* $FreeBSD$
*/
-/dts-v1/;
-
-/include/ "sun7i-a20.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
+#include "sun7i-a20-cubieboard2.dts"
/ {
- model = "Cubietech Cubieboard2";
-
- memory {
- device_type = "memory";
- reg = < 0x40000000 0x40000000 >; /* 1GB RAM */
- };
-
- aliases {
- soc = &SOC;
- UART0 = &UART0;
- };
-
- SOC: a20 {
-
- usb1: usb@01c14000 {
- status = "okay";
- };
-
- usb2: usb@01c1c000 {
- status = "okay";
- };
-
- UART0: serial@01c28000 {
- status = "okay";
- };
-
- mmc0: mmc@01c0f000 {
- status = "okay";
- };
-
- emac@01c0b000 {
- status = "okay";
- };
-
- gmac@01c50000 {
- status = "okay";
- };
-
- ahci: sata@01c18000 {
- status = "okay";
+ soc@01c00000 {
+ ccm@01c20000 {
+ compatible = "allwinner,sun4i-ccm";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = < 0x01c20000 0x400 >;
};
};
-
- leds {
- compatible = "gpio-leds";
-
- blue {
- label = "cubieboard2:blue:usr";
- gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
- };
-
- green {
- label = "cubieboard2:green:usr";
- gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
- };
- };
-
- chosen {
- bootargs = "-v";
- stdin = "UART0";
- stdout = "UART0";
- };
};
-
Index: sys/boot/fdt/dts/arm/olimex-a20-som-evb.dts
===================================================================
--- sys/boot/fdt/dts/arm/olimex-a20-som-evb.dts
+++ sys/boot/fdt/dts/arm/olimex-a20-som-evb.dts
@@ -2,8 +2,6 @@
* Copyright (c) 2015 Emmanuel Vadot <manu@bidouilliste.com>
* All rights reserved.
*
- * This code is derived from software written for Brini by Mark Brinicombe
- *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -26,22 +24,17 @@
* SUCH DAMAGE.
*
* $FreeBSD$
- *
*/
-#ifndef AW_MACHDEP_H
-#define AW_MACHDEP_H
-
-#define ALLWINNERSOC_A10 0x10000000
-#define ALLWINNERSOC_A13 0x13000000
-#define ALLWINNERSOC_A10S 0x10000001
-#define ALLWINNERSOC_A20 0x20000000
-
-#define ALLWINNERSOC_SUN4I 0x40000000
-#define ALLWINNERSOC_SUN5I 0x50000000
-#define ALLWINNERSOC_SUN7I 0x70000000
-
-u_int allwinner_soc_type(void);
-u_int allwinner_soc_family(void);
-
-#endif /* AW_MACHDEP_H */
+#include "sun7i-a20-olimex-som-evb.dts"
+
+/ {
+ soc@01c00000 {
+ ccm@01c20000 {
+ compatible = "allwinner,sun4i-ccm";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = < 0x01c20000 0x400 >;
+ };
+ };
+};
Index: sys/boot/fdt/dts/arm/olinuxino-lime.dts
===================================================================
--- sys/boot/fdt/dts/arm/olinuxino-lime.dts
+++ sys/boot/fdt/dts/arm/olinuxino-lime.dts
@@ -2,8 +2,6 @@
* Copyright (c) 2015 Emmanuel Vadot <manu@bidouilliste.com>
* All rights reserved.
*
- * This code is derived from software written for Brini by Mark Brinicombe
- *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -24,24 +22,19 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
- *
+ *
* $FreeBSD$
- *
*/
-#ifndef AW_MACHDEP_H
-#define AW_MACHDEP_H
-
-#define ALLWINNERSOC_A10 0x10000000
-#define ALLWINNERSOC_A13 0x13000000
-#define ALLWINNERSOC_A10S 0x10000001
-#define ALLWINNERSOC_A20 0x20000000
-
-#define ALLWINNERSOC_SUN4I 0x40000000
-#define ALLWINNERSOC_SUN5I 0x50000000
-#define ALLWINNERSOC_SUN7I 0x70000000
-
-u_int allwinner_soc_type(void);
-u_int allwinner_soc_family(void);
-
-#endif /* AW_MACHDEP_H */
+#include "sun4i-a10-olinuxino-lime.dts"
+
+/ {
+ soc@01c00000 {
+ ccm@01c20000 {
+ compatible = "allwinner,sun4i-ccm";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = < 0x01c20000 0x400 >;
+ };
+ };
+};
Index: sys/boot/fdt/dts/arm/sun4i-a10.dtsi
===================================================================
--- sys/boot/fdt/dts/arm/sun4i-a10.dtsi
+++ sys/boot/fdt/dts/arm/sun4i-a10.dtsi
@@ -45,7 +45,7 @@
bus-frequency = <0>;
AINTC: interrupt-controller@01c20400 {
- compatible = "allwinner,sun4i-ic";
+ compatible = "allwinner,sun4i-a10-ic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
@@ -67,7 +67,7 @@
};
timer@01c20c00 {
- compatible = "allwinner,sun4i-timer";
+ compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = < 22 >;
interrupt-parent = <&AINTC>;
@@ -82,7 +82,7 @@
GPIO: gpio@01c20800 {
#gpio-cells = <3>;
- compatible = "allwinner,sun4i-gpio";
+ compatible = "allwinner,sun4i-a10-pinctrl";
gpio-controller;
reg =< 0x01c20800 0x400 >;
interrupts = < 28 >;
@@ -90,14 +90,14 @@
};
usb1: usb@01c14000 {
- compatible = "allwinner,usb-ehci", "usb-ehci";
+ compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
reg = <0x01c14000 0x1000>;
interrupts = < 39 >;
interrupt-parent = <&AINTC>;
};
usb2: usb@01c1c000 {
- compatible = "allwinner,usb-ehci", "usb-ehci";
+ compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
reg = <0x01c1c000 0x1000>;
interrupts = < 40 >;
interrupt-parent = <&AINTC>;
@@ -130,7 +130,7 @@
};
emac@01c0b000 {
- compatible = "allwinner,sun4i-emac";
+ compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
interrupt-parent = <&AINTC>;
Index: sys/boot/fdt/dts/arm/sun7i-a20.dtsi
===================================================================
--- sys/boot/fdt/dts/arm/sun7i-a20.dtsi
+++ sys/boot/fdt/dts/arm/sun7i-a20.dtsi
@@ -26,6 +26,8 @@
* $FreeBSD$
*/
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
/ {
compatible = "allwinner,sun7i-a20";
#address-cells = <1>;
@@ -37,6 +39,14 @@
soc = &SOC;
};
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
SOC: a20 {
#address-cells = <1>;
#size-cells = <1>;
@@ -47,9 +57,12 @@
GIC: interrupt-controller@01c81000 {
compatible = "arm,gic";
reg = <0x01c81000 0x1000>, /* Distributor Registers */
- <0x01c82000 0x0100>; /* CPU Interface Registers */
+ <0x01c82000 0x0100>, /* CPU Interface Registers */
+ <0x01c84000 0x2000>,
+ <0x01c86000 0x2000>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
sramc@01c00000 {
@@ -74,53 +87,59 @@
};
timer@01c20c00 {
- compatible = "allwinner,sun7i-timer";
+ compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
- interrupts = < 22 >;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&GIC>;
clock-frequency = < 24000000 >;
};
watchdog@01c20c90 {
- compatible = "allwinner,sun4i-wdt";
+ compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
};
pio: gpio@01c20800 {
#gpio-cells = <3>;
- compatible = "allwinner,sun4i-gpio";
+ compatible = "allwinner,sun7i-a20-pinctrl";
gpio-controller;
reg =< 0x01c20800 0x400 >;
- interrupts = < 28 >;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
interrupt-parent = <&GIC>;
};
usb1: usb@01c14000 {
- compatible = "allwinner,usb-ehci", "usb-ehci";
+ compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
reg = <0x01c14000 0x1000>;
- interrupts = < 39 >;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&GIC>;
};
usb2: usb@01c1c000 {
- compatible = "allwinner,usb-ehci", "usb-ehci";
+ compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
reg = <0x01c1c000 0x1000>;
- interrupts = < 40 >;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&GIC>;
};
mmc0: mmc@01c0f000 {
- compatible = "allwinner,sun4i-a10-mmc";
+ compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
- interrupts = <32>;
- interrupt-parent = <&GIC>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sata@01c18000 {
compatible = "allwinner,sun4i-a10-ahci";
reg = <0x01c18000 0x1000>;
- interrupts = <56>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&GIC>;
status = "disabled";
};
@@ -129,16 +148,15 @@
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
reg-shift = <2>;
- interrupts = <1>;
- interrupt-parent = <&GIC>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
current-speed = <115200>;
clock-frequency = < 24000000 >;
};
emac@01c0b000 {
- compatible = "allwinner,sun4i-emac";
+ compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
- interrupts = <55>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&GIC>;
status = "disabled";
};
@@ -146,7 +164,7 @@
gmac@01c50000 {
compatible = "allwinner,sun7i-a20-gmac";
reg = <0x01c50000 0x10000>;
- interrupts = <85>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&GIC>;
snps,pbl = <2>;
snps,fixed-burst;
Index: sys/modules/dtb/allwinner/Makefile
===================================================================
--- sys/modules/dtb/allwinner/Makefile
+++ sys/modules/dtb/allwinner/Makefile
@@ -3,6 +3,8 @@
DTS= \
bananapi.dts \
cubieboard.dts \
- cubieboard2.dts
+ cubieboard2.dts \
+ olimex-a20-som-evb.dts \
+ olinuxino-lime.dts
.include <bsd.dtb.mk>
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