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diff --git a/sys/dev/dpaa2/dpaa2_frame.h b/sys/dev/dpaa2/dpaa2_frame.h
--- a/sys/dev/dpaa2/dpaa2_frame.h
+++ b/sys/dev/dpaa2/dpaa2_frame.h
@@ -58,6 +58,8 @@
#define DPAA2_FD_OFFSET_MASK (0x0FFFu)
#define DPAA2_FD_PTAC_MASK (0x7u)
#define DPAA2_FD_PTAC_SHIFT (21)
+#define DPAA2_FD_ASAL_MASK (0xFu)
+#define DPAA2_FD_ASAL_SHIFT (16)
/*
* DPAA2 frame annotation sizes
@@ -73,6 +75,31 @@
#define DPAA2_FA_SWA_SIZE 64u /* SW frame annotation */
#define DPAA2_FA_HWA_SIZE 128u /* HW frame annotation */
#define DPAA2_FA_WRIOP_SIZE 128u /* WRIOP HW annotation */
+#define DPAA2_FA_HWA_FAS_SIZE 8u /* Frame annotation status */
+
+/*
+ * DPAA2 annotation valid bits in FD[FRC].
+ *
+ * See 7.31.2 WRIOP FD frame context (FRC),
+ * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020
+ */
+#define DPAA2_FD_FRC_FASV (1 << 15)
+#define DPAA2_FD_FRC_FAEADV (1 << 14)
+#define DPAA2_FD_FRC_FAPRV (1 << 13)
+#define DPAA2_FD_FRC_FAIADV (1 << 12)
+#define DPAA2_FD_FRC_FASWOV (1 << 11)
+#define DPAA2_FD_FRC_FAICFDV (1 << 10)
+
+/*
+ * DPAA2 Frame annotation status word.
+ *
+ * See 7.34.3 Frame annotation status word (FAS),
+ * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020
+ */
+#define DPAA2_FAS_L3CV (1 << 3) /* L3 csum validated */
+#define DPAA2_FAS_L3CE (1 << 2) /* L3 csum error */
+#define DPAA2_FAS_L4CV (1 << 1) /* L4 csum validated*/
+#define DPAA2_FAS_L4CE (1 << 0) /* L4 csum error */
/**
* @brief DPAA2 frame descriptor.
@@ -126,13 +153,18 @@
CTASSERT(sizeof(struct dpaa2_hwa_wriop) == DPAA2_FA_WRIOP_SIZE);
/**
- * @brief DPAA2 hardware frame annotation (accelerator-specific annotation).
+ * @brief DPAA2 hardware frame annotation.
*
* See 3.4.1.2 Accelerator-specific annotation,
* LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020
*/
struct dpaa2_hwa {
union {
+ /* Keep fields common to all accelerators at the top. */
+ struct {
+ uint64_t fas;
+ } __packed;
+ /* Keep accelerator-specific annotations below. */
struct dpaa2_hwa_wriop wriop;
};
} __packed;
@@ -159,6 +191,20 @@
} __packed;
CTASSERT(sizeof(struct dpaa2_swa) == DPAA2_FA_SWA_SIZE);
+/**
+ * @brief Frame annotation status word.
+ *
+ * See 7.34.3 Frame annotation status word (FAS),
+ * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020
+ */
+struct dpaa2_hwa_fas {
+ uint8_t _reserved1;
+ uint8_t ppid;
+ uint16_t ifpid;
+ uint32_t status;
+} __packed;
+CTASSERT(sizeof(struct dpaa2_hwa_fas) == DPAA2_FA_HWA_FAS_SIZE);
+
int dpaa2_fd_build(device_t, const uint16_t, struct dpaa2_buf *,
bus_dma_segment_t *, const int, struct dpaa2_fd *);
@@ -168,7 +214,12 @@
bool dpaa2_fd_short_len(struct dpaa2_fd *);
int dpaa2_fd_offset(struct dpaa2_fd *);
+uint32_t dpaa2_fd_get_frc(struct dpaa2_fd *);
+void dpaa2_fd_set_frc(struct dpaa2_fd *, uint32_t);
+
int dpaa2_fa_get_swa(struct dpaa2_fd *, struct dpaa2_swa **);
int dpaa2_fa_get_hwa(struct dpaa2_fd *, struct dpaa2_hwa **);
+int dpaa2_fa_get_fas(struct dpaa2_fd *, struct dpaa2_hwa_fas *);
+int dpaa2_fa_set_fas(struct dpaa2_fd *, struct dpaa2_hwa_fas *);
#endif /* _DPAA2_FRAME_H */
diff --git a/sys/dev/dpaa2/dpaa2_frame.c b/sys/dev/dpaa2/dpaa2_frame.c
--- a/sys/dev/dpaa2/dpaa2_frame.c
+++ b/sys/dev/dpaa2/dpaa2_frame.c
@@ -29,6 +29,7 @@
#include <sys/param.h>
#include <sys/errno.h>
+#include <sys/endian.h>
#include <vm/vm.h>
#include <vm/pmap.h>
@@ -138,12 +139,26 @@
return (fd->offset_fmt_sl & DPAA2_FD_OFFSET_MASK);
}
+uint32_t
+dpaa2_fd_get_frc(struct dpaa2_fd *fd)
+{
+ /* TODO: Convert endiannes in the other functions as well. */
+ return (le32toh(fd->frame_ctx));
+}
+
+void
+dpaa2_fd_set_frc(struct dpaa2_fd *fd, uint32_t frc)
+{
+ /* TODO: Convert endiannes in the other functions as well. */
+ fd->frame_ctx = htole32(frc);
+}
+
int
dpaa2_fa_get_swa(struct dpaa2_fd *fd, struct dpaa2_swa **swa)
{
int rc;
- if (fd == NULL || swa == NULL)
+ if (__predict_false(fd == NULL || swa == NULL))
return (EINVAL);
if (((fd->ctrl >> DPAA2_FD_PTAC_SHIFT) & DPAA2_FD_PTAC_MASK) >= 0x4u) {
@@ -160,6 +175,66 @@
int
dpaa2_fa_get_hwa(struct dpaa2_fd *fd, struct dpaa2_hwa **hwa)
{
- /* TODO: To be implemented next. */
- return (ENOENT);
+ uint8_t *buf;
+ int rc;
+
+ if (__predict_false(fd == NULL || hwa == NULL))
+ return (EINVAL);
+
+ /*
+ * XXX-DSL: As soon as the ASAL is in the 64-byte units, we don't need
+ * to calculate the exact length, but make sure that it isn't 0.
+ */
+ if (((fd->ctrl >> DPAA2_FD_ASAL_SHIFT) & DPAA2_FD_ASAL_MASK) > 0u) {
+ buf = (uint8_t *)PHYS_TO_DMAP((bus_addr_t)fd->addr);
+ *hwa = (struct dpaa2_hwa *)(buf +
+ ((((fd->ctrl >> DPAA2_FD_PTAC_SHIFT) & DPAA2_FD_PTAC_MASK)
+ >= 0x4u) ? DPAA2_FA_SWA_SIZE : 0u));
+ rc = 0;
+ } else {
+ *hwa = NULL;
+ rc = ENOENT;
+ }
+
+ return (rc);
+}
+
+int
+dpaa2_fa_get_fas(struct dpaa2_fd *fd, struct dpaa2_hwa_fas *fas)
+{
+ struct dpaa2_hwa *hwa;
+ struct dpaa2_hwa_fas *fasp;
+ int rc;
+
+ if (__predict_false(fd == NULL || fas == NULL))
+ return (EINVAL);
+
+ rc = dpaa2_fa_get_hwa(fd, &hwa);
+ if (__predict_false(rc != 0))
+ return (rc);
+
+ fasp = (struct dpaa2_hwa_fas *)&hwa->fas;
+ *fas = *fasp;
+
+ return (rc);
+}
+
+int
+dpaa2_fa_set_fas(struct dpaa2_fd *fd, struct dpaa2_hwa_fas *fas)
+{
+ struct dpaa2_hwa *hwa;
+ uint64_t *valp;
+ int rc;
+
+ if (__predict_false(fd == NULL || fas == NULL))
+ return (EINVAL);
+
+ rc = dpaa2_fa_get_hwa(fd, &hwa);
+ if (__predict_false(rc != 0))
+ return (rc);
+
+ valp = (uint64_t *)fas;
+ hwa->fas = *valp;
+
+ return (rc);
}
diff --git a/sys/dev/dpaa2/dpaa2_ni.c b/sys/dev/dpaa2/dpaa2_ni.c
--- a/sys/dev/dpaa2/dpaa2_ni.c
+++ b/sys/dev/dpaa2/dpaa2_ni.c
@@ -1,7 +1,7 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause
*
- * Copyright © 2021-2023 Dmitry Salychev
+ * Copyright © 2021-2026 Dmitry Salychev
* Copyright © 2022 Mathew McBride
*
* Redistribution and use in source and binary forms, with or without
@@ -415,6 +415,7 @@
/* Various subroutines */
static int dpaa2_ni_cmp_api_version(struct dpaa2_ni_softc *, uint16_t, uint16_t);
static int dpaa2_ni_prepare_key_cfg(struct dpkg_profile_cfg *, uint8_t *);
+static int dpaa2_ni_upd_checksum_flags(struct dpaa2_fd *, struct mbuf *);
/* Network interface routines */
static void dpaa2_ni_init(void *);
@@ -3124,6 +3125,7 @@
bus_addr_t released[DPAA2_SWP_BUFS_PER_CMD];
void *buf_data;
int buf_len, error, released_n = 0;
+ bool upd_chksum_flags;
error = dpaa2_fa_get_swa(fd, &swa);
if (__predict_false(error != 0))
@@ -3160,11 +3162,14 @@
switch (dpaa2_fd_format(fd)) {
case DPAA2_FD_SINGLE:
sc->rx_single_buf_frames++;
+ upd_chksum_flags = true;
break;
case DPAA2_FD_SG:
sc->rx_sg_buf_frames++;
+ upd_chksum_flags = true;
break;
default:
+ upd_chksum_flags = false;
break;
}
@@ -3197,6 +3202,13 @@
M_HASHTYPE_SET(m, M_HASHTYPE_OPAQUE);
if_inc_counter(sc->ifp, IFCOUNTER_IPACKETS, 1);
+ if (upd_chksum_flags) {
+ error = dpaa2_ni_upd_checksum_flags(fd, m);
+ if (error != 0)
+ device_printf(sc->dev, "%s: failed to update checksum "
+ "flags: error=%d\n", __func__, error);
+ }
+
if (ctx->head == NULL) {
KASSERT(ctx->tail == NULL, ("%s: tail already given?", __func__));
ctx->head = m;
@@ -3638,6 +3650,40 @@
return (0);
}
+static int
+dpaa2_ni_upd_checksum_flags(struct dpaa2_fd *fd, struct mbuf *m)
+{
+ struct dpaa2_hwa_fas fas;
+ uint32_t status;
+ int rc;
+
+ if (__predict_true(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV)) {
+ rc = dpaa2_fa_get_fas(fd, &fas);
+ if (rc != 0)
+ return (rc);
+ } else
+ return (EINVAL);
+
+ status = le32toh(fas.status);
+ rc = 0;
+
+ /* L3 */
+ if ((status & DPAA2_FAS_L3CV) != 0) {
+ m->m_pkthdr.csum_flags |= CSUM_L3_CALC;
+ if ((status & DPAA2_FAS_L3CE) == 0)
+ m->m_pkthdr.csum_flags |= CSUM_L3_VALID;
+ }
+ /* L4 */
+ if ((status & DPAA2_FAS_L4CV) != 0) {
+ m->m_pkthdr.csum_flags |= CSUM_L4_CALC;
+ m->m_pkthdr.csum_data = 0xffff;
+ if ((status & DPAA2_FAS_L4CE) == 0)
+ m->m_pkthdr.csum_flags |= CSUM_L4_VALID;
+ }
+
+ return (rc);
+}
+
static device_method_t dpaa2_ni_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, dpaa2_ni_probe),

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