D4792.id12667.diff
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	Index: sys/arm/allwinner/a10_clk.c
	===================================================================
	--- sys/arm/allwinner/a10_clk.c
	+++ sys/arm/allwinner/a10_clk.c
	@@ -109,7 +109,8 @@

	static devclass_t a10_ccm_devclass;

	-DRIVER_MODULE(a10_ccm, simplebus, a10_ccm_driver, a10_ccm_devclass, 0, 0);
	+EARLY_DRIVER_MODULE(a10_ccm, simplebus, a10_ccm_driver, a10_ccm_devclass, 0, 0,
	+ BUS_PASS_TIMER);

	int
	a10_clk_usb_activate(void)
	@@ -200,7 +201,7 @@

	/* Set GMAC mode. */
	reg_value = CCM_GMAC_CLK_MII;
	- if (OF_getprop_alloc(node, "phy-type", 1, (void **)&phy_type) > 0) {
	+ if (OF_getprop_alloc(node, "phy-mode", 1, (void **)&phy_type) > 0) {
	if (strcasecmp(phy_type, "rgmii") == 0)
	reg_value = CCM_GMAC_CLK_RGMII \| CCM_GMAC_MODE_RGMII;
	else if (strcasecmp(phy_type, "rgmii-bpi") == 0) {
	Index: sys/arm/allwinner/a10_common.c
	===================================================================
	--- sys/arm/allwinner/a10_common.c
	+++ sys/arm/allwinner/a10_common.c
	@@ -50,7 +50,7 @@
	{
	int offset;

	- if (fdt_is_compatible(node, "allwinner,sun4i-ic"))
	+ if (fdt_is_compatible(node, "allwinner,sun4i-a10-ic"))
	offset = 0;
	else if (fdt_is_compatible(node, "arm,gic"))
	offset = 32;
	Index: sys/arm/allwinner/a10_ehci.c
	===================================================================
	--- sys/arm/allwinner/a10_ehci.c
	+++ sys/arm/allwinner/a10_ehci.c
	@@ -43,10 +43,10 @@
	#include <sys/gpio.h>

	#include <machine/bus.h>
	-#include <dev/ofw/ofw_bus.h>
	+#include <dev/ofw/ofw_bus.h>
	#include <dev/ofw/ofw_bus_subr.h>

	-#include <dev/usb/usb.h>
	+#include <dev/usb/usb.h>
	#include <dev/usb/usbdi.h>

	#include <dev/usb/usb_core.h>
	@@ -90,14 +90,19 @@
	bs_r_1_proto(reversed);
	bs_w_1_proto(reversed);

	+static struct ofw_compat_data compat_data[] = {
	+ {"allwinner,sun4i-a10-ehci", 1},
	+ {"allwinner,sun7i-a20-ehci", 1},
	+ {NULL, 0}
	+};
	+
	static int
	a10_ehci_probe(device_t self)
	{
	-
	if (!ofw_bus_status_okay(self))
	return (ENXIO);

	- if (!ofw_bus_is_compatible(self, "allwinner,usb-ehci"))
	+ if (ofw_bus_search_compatible(self, compat_data)->ocd_data == 0)
	return (ENXIO);

	device_set_desc(self, EHCI_HC_DEVSTR);
	Index: sys/arm/allwinner/a10_gpio.c
	===================================================================
	--- sys/arm/allwinner/a10_gpio.c
	+++ sys/arm/allwinner/a10_gpio.c
	@@ -73,6 +73,12 @@
	#define A10_GPIO_INPUT 0
	#define A10_GPIO_OUTPUT 1

	+static struct ofw_compat_data compat_data[] = {
	+ {"allwinner,sun4i-a10-pinctrl", 1},
	+ {"allwinner,sun7i-a20-pinctrl", 1},
	+ {NULL, 0}
	+};
	+
	struct a10_gpio_softc {
	device_t sc_dev;
	device_t sc_busdev;
	@@ -373,7 +379,7 @@
	if (!ofw_bus_status_okay(dev))
	return (ENXIO);

	- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-gpio"))
	+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
	return (ENXIO);

	device_set_desc(dev, "Allwinner GPIO controller");
	@@ -493,7 +499,9 @@
	sizeof(struct a10_gpio_softc),
	};

	-DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0);
	+EARLY_DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0,
	+ BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
	+

	int
	a10_gpio_ethernet_activate(uint32_t func)
	Index: sys/arm/allwinner/a10_mmc.c
	===================================================================
	--- sys/arm/allwinner/a10_mmc.c
	+++ sys/arm/allwinner/a10_mmc.c
	@@ -62,6 +62,12 @@

	TUNABLE_INT("hw.a10.mmc.pio_mode", &a10_mmc_pio_mode);

	+static struct ofw_compat_data compat_data[] = {
	+ {"allwinner,sun4i-a10-mmc", 1},
	+ {"allwinner,sun5i-a13-mmc", 1},
	+ {NULL, 0}
	+};
	+
	struct a10_mmc_softc {
	bus_space_handle_t a10_bsh;
	bus_space_tag_t a10_bst;
	@@ -123,8 +129,9 @@

	if (!ofw_bus_status_okay(dev))
	return (ENXIO);
	- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-mmc"))
	+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
	return (ENXIO);
	+
	device_set_desc(dev, "Allwinner Integrated MMC/SD controller");

	return (BUS_PROBE_DEFAULT);
	Index: sys/arm/allwinner/a10_wdog.c
	===================================================================
	--- sys/arm/allwinner/a10_wdog.c
	+++ sys/arm/allwinner/a10_wdog.c
	@@ -95,7 +95,7 @@
	if (!ofw_bus_status_okay(dev))
	return (ENXIO);

	- if (ofw_bus_is_compatible(dev, "allwinner,sun4i-wdt")) {
	+ if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-wdt")) {
	device_set_desc(dev, "Allwinner A10 Watchdog");
	return (BUS_PROBE_DEFAULT);
	}
	Index: sys/arm/allwinner/a20/a20_cpu_cfg.c
	===================================================================
	--- sys/arm/allwinner/a20/a20_cpu_cfg.c
	+++ sys/arm/allwinner/a20/a20_cpu_cfg.c
	@@ -117,7 +117,8 @@

	static devclass_t a20_cpu_cfg_devclass;

	-DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, a20_cpu_cfg_devclass, 0, 0);
	+EARLY_DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, a20_cpu_cfg_devclass, 0, 0,
	+ BUS_PASS_RESOURCE);

	uint64_t
	a20_read_counter64(void)
	Index: sys/arm/allwinner/aintc.c
	===================================================================
	--- sys/arm/allwinner/aintc.c
	+++ sys/arm/allwinner/aintc.c
	@@ -101,7 +101,8 @@
	if (!ofw_bus_status_okay(dev))
	return (ENXIO);

	- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-ic"))
	+ if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-ic") &&
	+ !ofw_bus_is_compatible(dev, "allwinner,sun7i-a20-sc-nmi"))
	return (ENXIO);
	device_set_desc(dev, "A10 AINTC Interrupt Controller");
	return (BUS_PROBE_DEFAULT);
	@@ -158,7 +159,8 @@

	static devclass_t a10_aintc_devclass;

	-DRIVER_MODULE(aintc, simplebus, a10_aintc_driver, a10_aintc_devclass, 0, 0);
	+EARLY_DRIVER_MODULE(aintc, simplebus, a10_aintc_driver, a10_aintc_devclass, 0, 0,
	+ BUS_PASS_INTERRUPT + BUS_PASS_ORDER_FIRST);

	int
	arm_get_next_irq(int last_irq)
	Index: sys/arm/allwinner/allwinner_machdep.h
	===================================================================
	--- sys/arm/allwinner/allwinner_machdep.h
	+++ sys/arm/allwinner/allwinner_machdep.h
	@@ -1,5 +1,5 @@
	/*-
	- * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@freebsd.org>
	+ * Copyright (c) 2015 Emmanuel Vadot <manu@bidouilliste.com>
	* All rights reserved.
	*
	* Redistribution and use in source and binary forms, with or without
	@@ -22,51 +22,22 @@
	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	* SUCH DAMAGE.
	+ *
	*/

	-#include <sys/cdefs.h>
	-__FBSDID("$FreeBSD$");
	-
	-#include <sys/param.h>
	-#include <sys/systm.h>
	-#include <sys/bus.h>
	-#include <sys/kernel.h>
	-
	-#include <dev/fdt/fdt_common.h>
	-#include <dev/ofw/openfirm.h>
	-
	-#include <machine/bus.h>
	-#include <machine/vmparam.h>
	-
	-struct fdt_fixup_entry fdt_fixup_table[] = {
	- { NULL, NULL }
	-};
	-
	-#ifndef ARM_INTRNG
	-
	-static int
	-fdt_aintc_decode_ic(phandle_t node, pcell_t intr, int interrupt, int *trig,
	- int *pol)
	-{
	- int offset;
	-
	- if (fdt_is_compatible(node, "allwinner,sun4i-ic"))
	- offset = 0;
	- else if (fdt_is_compatible(node, "arm,gic"))
	- offset = 32;
	- else
	- return (ENXIO);
	+#ifndef AW_MACHDEP_H
	+#define AW_MACHDEP_H

	- *interrupt = fdt32_to_cpu(intr[0]) + offset;
	- *trig = INTR_TRIGGER_CONFORM;
	- *pol = INTR_POLARITY_CONFORM;
	+#define ALLWINNERSOC_A10 0x10000000
	+#define ALLWINNERSOC_A13 0x13000000
	+#define ALLWINNERSOC_A10S 0x10000001
	+#define ALLWINNERSOC_A20 0x20000000

	- return (0);
	-}
	+#define ALLWINNERSOC_SUN4I 0x40000000
	+#define ALLWINNERSOC_SUN5I 0x50000000
	+#define ALLWINNERSOC_SUN7I 0x70000000

	-fdt_pic_decode_t fdt_pic_table[] = {
	- &fdt_aintc_decode_ic,
	- NULL
	-};
	+u_int allwinner_soc_type(void);
	+u_int allwinner_soc_family(void);

	-#endif /* ARM_INTRNG */
	+#endif /* AW_MACHDEP_H */
	Index: sys/arm/allwinner/allwinner_machdep.c
	===================================================================
	--- sys/arm/allwinner/allwinner_machdep.c
	+++ sys/arm/allwinner/allwinner_machdep.c
	@@ -63,6 +63,7 @@
	{
	soc_type = ALLWINNERSOC_A10;
	soc_family = ALLWINNERSOC_SUN4I;
	+
	return (0);
	}

	Index: sys/arm/allwinner/files.a10
	===================================================================
	--- sys/arm/allwinner/files.a10
	+++ sys/arm/allwinner/files.a10
	@@ -1,3 +1,4 @@
	# $FreeBSD$

	arm/allwinner/aintc.c standard
	+arm/allwinner/timer.c standard
	Index: sys/arm/allwinner/files.allwinner
	===================================================================
	--- sys/arm/allwinner/files.allwinner
	+++ sys/arm/allwinner/files.allwinner
	@@ -12,5 +12,4 @@
	arm/allwinner/a20/a20_cpu_cfg.c standard
	arm/allwinner/allwinner_machdep.c standard
	arm/allwinner/if_emac.c optional emac
	-arm/allwinner/timer.c standard
	#arm/allwinner/console.c standard
	Index: sys/arm/allwinner/if_emac.c
	===================================================================
	--- sys/arm/allwinner/if_emac.c
	+++ sys/arm/allwinner/if_emac.c
	@@ -756,7 +756,7 @@
	emac_probe(device_t dev)
	{

	- if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-emac"))
	+ if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-emac"))
	return (ENXIO);

	device_set_desc(dev, "A10/A20 EMAC ethernet controller");
	Index: sys/arm/allwinner/timer.c
	===================================================================
	--- sys/arm/allwinner/timer.c
	+++ sys/arm/allwinner/timer.c
	@@ -50,7 +50,7 @@

	#include <sys/kdb.h>

	-#include "a20/a20_cpu_cfg.h"
	+#include <arm/allwinner/allwinner_machdep.h>

	/**
	* Timer registers addr
	@@ -84,7 +84,6 @@
	uint32_t sc_period;
	uint32_t timer0_freq;
	struct eventtimer et;
	- uint8_t sc_timer_type; /* 0 for A10, 1 for A20 */
	};

	int a10_timer_get_timerfreq(struct a10_timer_softc *);
	@@ -127,10 +126,6 @@
	{
	uint32_t lo, hi;

	- /* In case of A20 get appropriate counter info */
	- if (a10_timer_sc->sc_timer_type)
	- return (a20_read_counter64());
	-
	/* Latch counter, wait for it to be ready to read. */
	timer_write_4(a10_timer_sc, CNT64_CTRL_REG, CNT64_RL_EN);
	while (timer_read_4(a10_timer_sc, CNT64_CTRL_REG) & CNT64_RL_EN)
	@@ -146,13 +141,16 @@
	a10_timer_probe(device_t dev)
	{
	struct a10_timer_softc *sc;
	+ u_int soc_family;

	sc = device_get_softc(dev);

	- if (ofw_bus_is_compatible(dev, "allwinner,sun4i-timer"))
	- sc->sc_timer_type = 0;
	- else if (ofw_bus_is_compatible(dev, "allwinner,sun7i-timer"))
	- sc->sc_timer_type = 1;
	+ soc_family = allwinner_soc_family();
	+ if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-timer")) {
	+ if (soc_family != ALLWINNERSOC_SUN4I &&
	+ soc_family != ALLWINNERSOC_SUN5I)
	+ return (ENXIO);
	+ }
	else
	return (ENXIO);

	@@ -352,7 +350,8 @@

	static devclass_t a10_timer_devclass;

	-DRIVER_MODULE(a10_timer, simplebus, a10_timer_driver, a10_timer_devclass, 0, 0);
	+EARLY_DRIVER_MODULE(a10_timer, simplebus, a10_timer_driver, a10_timer_devclass, 0, 0,
	+ BUS_PASS_TIMER);

	void
	DELAY(int usec)
	Index: sys/arm/conf/A10
	===================================================================
	--- sys/arm/conf/A10
	+++ sys/arm/conf/A10
	@@ -1,5 +1,5 @@
	#
	-# A20 -- Custom configuration for the Allwinner A20 ARM SoC
	+# A10 -- Custom configuration for the AllWinner A10 SoC
	#
	# For more information on this file, please read the config(5) manual page,
	# and/or the handbook section on Kernel Configuration Files:
	@@ -18,16 +18,13 @@
	#
	# $FreeBSD$

	-ident A20
	+ident A10

	include "std.armv6"
	-include "../allwinner/a20/std.a20"
	-
	-options ARM_INTRNG
	+include "../allwinner/std.a10"

	options HZ=100
	-options SCHED_ULE # ULE scheduler
	-options SMP # Enable multiple cores
	+options SCHED_4BSD # 4BSD scheduler
	options PLATFORM

	# Debugging for use in -current
	@@ -50,14 +47,11 @@
	#options BOOTP_NFSROOT
	#options BOOTP_COMPAT
	#options BOOTP_NFSV3
	-#options BOOTP_WIRED_TO=dwc0
	+#options BOOTP_WIRED_TO=cpsw0

	# Boot device is 2nd slice on MMC/SD card
	options ROOTDEVNAME=\"ufs:/dev/da0s2\"

	-# Interrupt controller
	-device gic
	-
	# MMC/SD/SDIO Card slot support
	device mmc # mmc/sd bus
	device mmcsd # mmc/sd flash cards
	@@ -80,7 +74,6 @@

	# GPIO
	device gpio
	-device gpioled

	device scbus # SCSI bus (required for ATA/SCSI)
	device da # Direct Access (disks)
	@@ -104,8 +97,7 @@
	device mii
	device bpf

	-#device emac # 10/100 integrated EMAC controller
	-device dwc # 10/100/1000 integrated GMAC controller
	+device emac

	# USB ethernet support, requires miibus
	device miibus
	Index: sys/arm/conf/A20
	===================================================================
	--- sys/arm/conf/A20
	+++ sys/arm/conf/A20
	@@ -58,6 +58,9 @@
	# Interrupt controller
	device gic

	+# ARM Generic Timer
	+device generic_timer
	+
	# MMC/SD/SDIO Card slot support
	device mmc # mmc/sd bus
	device mmcsd # mmc/sd flash cards
	Index: sys/boot/fdt/dts/arm/bananapi.dts
	===================================================================
	--- sys/boot/fdt/dts/arm/bananapi.dts
	+++ sys/boot/fdt/dts/arm/bananapi.dts
	@@ -28,7 +28,8 @@

	/dts-v1/;

	-/include/ "sun7i-a20.dtsi"
	+#include "sun7i-a20.dtsi"
	+

	#include <dt-bindings/gpio/gpio.h>

	@@ -65,7 +66,7 @@
	};

	gmac@01c50000 {
	- phy-type = "rgmii-bpi";
	+ phy-mode = "rgmii-bpi";
	status = "okay";
	};

	Index: sys/boot/fdt/dts/arm/cubieboard2.dts
	===================================================================
	--- sys/boot/fdt/dts/arm/cubieboard2.dts
	+++ sys/boot/fdt/dts/arm/cubieboard2.dts
	@@ -28,7 +28,7 @@

	/dts-v1/;

	-/include/ "sun7i-a20.dtsi"
	+#include "sun7i-a20.dtsi"

	#include <dt-bindings/gpio/gpio.h>

	Index: sys/boot/fdt/dts/arm/olimex-a20-som-evb.dts
	===================================================================
	--- sys/boot/fdt/dts/arm/olimex-a20-som-evb.dts
	+++ sys/boot/fdt/dts/arm/olimex-a20-som-evb.dts
	@@ -1,5 +1,5 @@
	/*-
	- * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
	+ * Copyright (c) 2015 Emmanuel Vadot <manu@bidouilliste.com>
	* All rights reserved.
	*
	* Redistribution and use in source and binary forms, with or without
	@@ -22,70 +22,23 @@
	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	* SUCH DAMAGE.
	- *
	+ *
	* $FreeBSD$
	*/

	-/dts-v1/;
	-
	-/include/ "sun7i-a20.dtsi"
	-
	-#include <dt-bindings/gpio/gpio.h>
	+#include "sun7i-a20-olimex-som-evb.dts"

	/ {
	- model = "LeMaker Banana Pi";
	- compatible = "lemaker,bananapi", "allwinner,sun7i-a20";
	-
	- memory {
	- device_type = "memory";
	- reg = < 0x40000000 0x40000000 >; /* 1GB RAM */
	- };
	-
	- aliases {
	- soc = &SOC;
	- UART0 = &UART0;
	- };
	-
	- SOC: a20 {
	-
	- usb1: usb@01c14000 {
	- status = "okay";
	- };
	-
	- usb2: usb@01c1c000 {
	- status = "okay";
	- };
	-
	- UART0: serial@01c28000 {
	- status = "okay";
	- };
	-
	- mmc0: mmc@01c0f000 {
	- status = "okay";
	- };
	-
	- gmac@01c50000 {
	- phy-type = "rgmii-bpi";
	- status = "okay";
	- };
	-
	- ahci: sata@01c18000 {
	- status = "okay";
	- };
	- };
	-
	- leds {
	- compatible = "gpio-leds";
	-
	- green {
	- label = "bananapi:green:usr";
	- gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>;
	+ soc@01c00000 {
	+ ccm@01c20000 {
	+ compatible = "allwinner,sun4i-ccm";
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ reg = < 0x01c20000 0x400 >;
	};
	};
	+};

	- chosen {
	- bootargs = "-v";
	- stdin = "UART0";
	- stdout = "UART0";
	- };
	+&gmac {
	+ phy-mode = "rgmii-bpi";
	};
	Index: sys/boot/fdt/dts/arm/olinuxino-lime.dts
	===================================================================
	--- sys/boot/fdt/dts/arm/olinuxino-lime.dts
	+++ sys/boot/fdt/dts/arm/olinuxino-lime.dts
	@@ -1,5 +1,5 @@
	/*-
	- * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
	+ * Copyright (c) 2015 Emmanuel Vadot <manu@bidouilliste.com>
	* All rights reserved.
	*
	* Redistribution and use in source and binary forms, with or without
	@@ -26,66 +26,15 @@
	* $FreeBSD$
	*/

	-/dts-v1/;
	-
	-/include/ "sun7i-a20.dtsi"
	-
	-#include <dt-bindings/gpio/gpio.h>
	+#include "sun4i-a10-olinuxino-lime.dts"

	/ {
	- model = "LeMaker Banana Pi";
	- compatible = "lemaker,bananapi", "allwinner,sun7i-a20";
	-
	- memory {
	- device_type = "memory";
	- reg = < 0x40000000 0x40000000 >; /* 1GB RAM */
	- };
	-
	- aliases {
	- soc = &SOC;
	- UART0 = &UART0;
	- };
	-
	- SOC: a20 {
	-
	- usb1: usb@01c14000 {
	- status = "okay";
	- };
	-
	- usb2: usb@01c1c000 {
	- status = "okay";
	- };
	-
	- UART0: serial@01c28000 {
	- status = "okay";
	+ soc@01c00000 {
	+ ccm@01c20000 {
	+ compatible = "allwinner,sun4i-ccm";
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ reg = < 0x01c20000 0x400 >;
	};
	-
	- mmc0: mmc@01c0f000 {
	- status = "okay";
	- };
	-
	- gmac@01c50000 {
	- phy-type = "rgmii-bpi";
	- status = "okay";
	- };
	-
	- ahci: sata@01c18000 {
	- status = "okay";
	- };
	- };
	-
	- leds {
	- compatible = "gpio-leds";
	-
	- green {
	- label = "bananapi:green:usr";
	- gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>;
	- };
	- };
	-
	- chosen {
	- bootargs = "-v";
	- stdin = "UART0";
	- stdout = "UART0";
	};
	};
	Index: sys/boot/fdt/dts/arm/sun4i-a10.dtsi
	===================================================================
	--- sys/boot/fdt/dts/arm/sun4i-a10.dtsi
	+++ sys/boot/fdt/dts/arm/sun4i-a10.dtsi
	@@ -45,7 +45,7 @@
	bus-frequency = <0>;

	AINTC: interrupt-controller@01c20400 {
	- compatible = "allwinner,sun4i-ic";
	+ compatible = "allwinner,sun4i-a10-ic";
	interrupt-controller;
	#address-cells = <0>;
	#interrupt-cells = <1>;
	@@ -67,7 +67,7 @@
	};

	timer@01c20c00 {
	- compatible = "allwinner,sun4i-timer";
	+ compatible = "allwinner,sun4i-a10-timer";
	reg = <0x01c20c00 0x90>;
	interrupts = < 22 >;
	interrupt-parent = <&AINTC>;
	@@ -82,7 +82,7 @@

	GPIO: gpio@01c20800 {
	#gpio-cells = <3>;
	- compatible = "allwinner,sun4i-gpio";
	+ compatible = "allwinner,sun4i-a10-pinctrl";
	gpio-controller;
	reg =< 0x01c20800 0x400 >;
	interrupts = < 28 >;
	@@ -90,14 +90,14 @@
	};

	usb1: usb@01c14000 {
	- compatible = "allwinner,usb-ehci", "usb-ehci";
	+ compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
	reg = <0x01c14000 0x1000>;
	interrupts = < 39 >;
	interrupt-parent = <&AINTC>;
	};

	usb2: usb@01c1c000 {
	- compatible = "allwinner,usb-ehci", "usb-ehci";
	+ compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
	reg = <0x01c1c000 0x1000>;
	interrupts = < 40 >;
	interrupt-parent = <&AINTC>;
	@@ -130,7 +130,7 @@
	};

	emac@01c0b000 {
	- compatible = "allwinner,sun4i-emac";
	+ compatible = "allwinner,sun4i-a10-emac";
	reg = <0x01c0b000 0x1000>;
	interrupts = <55>;
	interrupt-parent = <&AINTC>;
	Index: sys/boot/fdt/dts/arm/sun7i-a20.dtsi
	===================================================================
	--- sys/boot/fdt/dts/arm/sun7i-a20.dtsi
	+++ sys/boot/fdt/dts/arm/sun7i-a20.dtsi
	@@ -26,6 +26,8 @@
	* $FreeBSD$
	*/

	+#include <dt-bindings/interrupt-controller/arm-gic.h>
	+
	/ {
	compatible = "allwinner,sun7i-a20";
	#address-cells = <1>;
	@@ -37,6 +39,14 @@
	soc = &SOC;
	};

	+ timer {
	+ compatible = "arm,armv7-timer";
	+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>;
	+ };
	+
	SOC: a20 {
	#address-cells = <1>;
	#size-cells = <1>;
	@@ -47,9 +57,12 @@
	GIC: interrupt-controller@01c81000 {
	compatible = "arm,gic";
	reg = <0x01c81000 0x1000>, /* Distributor Registers */
	- <0x01c82000 0x0100>; /* CPU Interface Registers */
	+ <0x01c82000 0x0100>, /* CPU Interface Registers */
	+ <0x01c84000 0x2000>,
	+ <0x01c86000 0x2000>;
	interrupt-controller;
	- #interrupt-cells = <1>;
	+ #interrupt-cells = <3>;
	+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>;
	};

	sramc@01c00000 {
	@@ -74,53 +87,59 @@
	};

	timer@01c20c00 {
	- compatible = "allwinner,sun7i-timer";
	+ compatible = "allwinner,sun4i-a10-timer";
	reg = <0x01c20c00 0x90>;
	- interrupts = < 22 >;
	+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
	+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
	+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
	+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
	+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
	+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&GIC>;
	clock-frequency = < 24000000 >;
	};

	watchdog@01c20c90 {
	- compatible = "allwinner,sun4i-wdt";
	+ compatible = "allwinner,sun4i-a10-wdt";
	reg = <0x01c20c90 0x10>;
	};

	pio: gpio@01c20800 {
	#gpio-cells = <3>;
	- compatible = "allwinner,sun4i-gpio";
	+ compatible = "allwinner,sun7i-a20-pinctrl";
	gpio-controller;
	reg =< 0x01c20800 0x400 >;
	- interrupts = < 28 >;
	+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
	+ interrupt-controller;
	+ #interrupt-cells = <2>;
	interrupt-parent = <&GIC>;
	};

	usb1: usb@01c14000 {
	- compatible = "allwinner,usb-ehci", "usb-ehci";
	+ compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
	reg = <0x01c14000 0x1000>;
	- interrupts = < 39 >;
	+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&GIC>;
	};

	usb2: usb@01c1c000 {
	- compatible = "allwinner,usb-ehci", "usb-ehci";
	+ compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
	reg = <0x01c1c000 0x1000>;
	- interrupts = < 40 >;
	+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&GIC>;
	};

	mmc0: mmc@01c0f000 {
	- compatible = "allwinner,sun4i-a10-mmc";
	+ compatible = "allwinner,sun5i-a13-mmc";
	reg = <0x01c0f000 0x1000>;
	- interrupts = <32>;
	- interrupt-parent = <&GIC>;
	+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
	status = "disabled";
	};

	sata@01c18000 {
	compatible = "allwinner,sun4i-a10-ahci";
	reg = <0x01c18000 0x1000>;
	- interrupts = <56>;
	+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&GIC>;
	status = "disabled";
	};
	@@ -129,16 +148,15 @@
	compatible = "snps,dw-apb-uart";
	reg = <0x01c28000 0x400>;
	reg-shift = <2>;
	- interrupts = <1>;
	- interrupt-parent = <&GIC>;
	+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
	current-speed = <115200>;
	clock-frequency = < 24000000 >;
	};

	emac@01c0b000 {
	- compatible = "allwinner,sun4i-emac";
	+ compatible = "allwinner,sun4i-a10-emac";
	reg = <0x01c0b000 0x1000>;
	- interrupts = <55>;
	+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&GIC>;
	status = "disabled";
	};
	@@ -146,7 +164,7 @@
	gmac@01c50000 {
	compatible = "allwinner,sun7i-a20-gmac";
	reg = <0x01c50000 0x10000>;
	- interrupts = <85>;
	+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&GIC>;
	snps,pbl = <2>;
	snps,fixed-burst;
	Index: sys/gnu/dts/arm/sun4i-a10-olinuxino-lime.dts
	===================================================================
	--- sys/gnu/dts/arm/sun4i-a10-olinuxino-lime.dts
	+++ sys/gnu/dts/arm/sun4i-a10-olinuxino-lime.dts
	@@ -16,11 +16,6 @@
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*
	- * You should have received a copy of the GNU General Public
	- * License along with this file; if not, write to the Free
	- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
	- * MA 02110-1301 USA
	- *
	* Or, alternatively,
	*
	* b) Permission is hereby granted, free of charge, to any person
	@@ -56,120 +51,187 @@
	model = "Olimex A10-OLinuXino-LIME";
	compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10";

	- soc@01c00000 {
	- emac: ethernet@01c0b000 {
	- pinctrl-names = "default";
	- pinctrl-0 = <&emac_pins_a>;
	- phy = <&phy1>;
	- status = "okay";
	- };
	+ aliases {
	+ serial0 = &uart0;
	+ };

	- mdio@01c0b080 {
	- status = "okay";
	+ chosen {
	+ stdout-path = "serial0:115200n8";
	+ };

	- phy1: ethernet-phy@1 {
	- reg = <1>;
	- };
	- };
	+ leds {
	+ compatible = "gpio-leds";
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&led_pins_olinuxinolime>;

	- mmc0: mmc@01c0f000 {
	- pinctrl-names = "default";
	- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
	- vmmc-supply = <&reg_vcc3v3>;
	- bus-width = <4>;
	- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
	- cd-inverted;
	- status = "okay";
	+ green {
	+ label = "a10-olinuxino-lime:green:usr";
	+ gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>;
	+ default-state = "on";
	};
	+ };
	+};

	- usbphy: phy@01c13400 {
	- usb1_vbus-supply = <&reg_usb1_vbus>;
	- usb2_vbus-supply = <&reg_usb2_vbus>;
	- status = "okay";
	- };
	+&ahci {
	+ target-supply = <&reg_ahci_5v>;
	+ status = "okay";
	+};

	- ehci0: usb@01c14000 {
	- status = "okay";
	- };
	+&cpu0 {
	+ /*
	+ * The A10-Lime is known to be unstable when running at 1008 MHz
	+ */
	+ operating-points = <
	+ /* kHz uV */
	+ 912000 1350000
	+ 864000 1300000
	+ 624000 1250000
	+ >;
	+ cooling-max-level = <2>;
	+};

	- ohci0: usb@01c14400 {
	- status = "okay";
	- };
	+&ehci0 {
	+ status = "okay";
	+};

	- ahci: sata@01c18000 {
	- target-supply = <&reg_ahci_5v>;
	- status = "okay";
	- };
	+&ehci1 {
	+ status = "okay";
	+};

	- ehci1: usb@01c1c000 {
	- status = "okay";
	- };
	+&emac {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&emac_pins_a>;
	+ phy = <&phy1>;
	+ status = "okay";
	+};

	- ohci1: usb@01c1c400 {
	- status = "okay";
	- };
	+&emac_sram {
	+ status = "okay";
	+};

	- pinctrl@01c20800 {
	- ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
	- allwinner,pins = "PC3";
	- allwinner,function = "gpio_out";
	- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	- };
	-
	- led_pins_olinuxinolime: led_pins@0 {
	- allwinner,pins = "PH2";
	- allwinner,function = "gpio_out";
	- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
	- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	- };
	- };
	+&i2c0 {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&i2c0_pins_a>;
	+ status = "okay";

	- uart0: serial@01c28000 {
	- pinctrl-names = "default";
	- pinctrl-0 = <&uart0_pins_a>;
	- status = "okay";
	- };
	+ axp209: pmic@34 {
	+ compatible = "x-powers,axp209";
	+ reg = <0x34>;
	+ interrupts = <0>;

	- i2c0: i2c@01c2ac00 {
	- pinctrl-names = "default";
	- pinctrl-0 = <&i2c0_pins_a>;
	- status = "okay";
	+ interrupt-controller;
	+ #interrupt-cells = <1>;
	+ };
	+};

	- axp209: pmic@34 {
	- compatible = "x-powers,axp209";
	- reg = <0x34>;
	- interrupts = <0>;
	+&i2c1 {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&i2c1_pins_a>;
	+ status = "okay";

	- interrupt-controller;
	- #interrupt-cells = <1>;
	- };
	- };
	+ eeprom: eeprom@50 {
	+ compatible = "atmel,24c16";
	+ reg = <0x50>;
	+ pagesize = <16>;
	};
	+};

	- leds {
	- compatible = "gpio-leds";
	- pinctrl-names = "default";
	- pinctrl-0 = <&led_pins_olinuxinolime>;
	+&mdio {
	+ status = "okay";

	- green {
	- label = "a10-olinuxino-lime:green:usr";
	- gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>;
	- default-state = "on";
	- };
	+ phy1: ethernet-phy@1 {
	+ reg = <1>;
	};
	+};
	+
	+&mmc0 {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
	+ vmmc-supply = <&reg_vcc3v3>;
	+ bus-width = <4>;
	+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
	+ cd-inverted;
	+ status = "okay";
	+};
	+
	+&ohci0 {
	+ status = "okay";
	+};
	+
	+&ohci1 {
	+ status = "okay";
	+};
	+
	+&otg_sram {
	+ status = "okay";
	+};

	- reg_ahci_5v: ahci-5v {
	- pinctrl-0 = <&ahci_pwr_pin_olinuxinolime>;
	- gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
	- status = "okay";
	+&pio {
	+ ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
	+ allwinner,pins = "PC3";
	+ allwinner,function = "gpio_out";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	- reg_usb1_vbus: usb1-vbus {
	- status = "okay";
	+ led_pins_olinuxinolime: led_pins@0 {
	+ allwinner,pins = "PH2";
	+ allwinner,function = "gpio_out";
	+ allwinner,drive = <SUN4I_PINCTRL_20_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	- reg_usb2_vbus: usb2-vbus {
	- status = "okay";
	+ usb0_id_detect_pin: usb0_id_detect_pin@0 {
	+ allwinner,pins = "PH4";
	+ allwinner,function = "gpio_in";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
	};
	+
	+ usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
	+ allwinner,pins = "PH5";
	+ allwinner,function = "gpio_in";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
	+ };
	+};
	+
	+&reg_ahci_5v {
	+ pinctrl-0 = <&ahci_pwr_pin_olinuxinolime>;
	+ gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
	+ status = "okay";
	+};
	+
	+&reg_usb0_vbus {
	+ status = "okay";
	+};
	+
	+&reg_usb1_vbus {
	+ status = "okay";
	+};
	+
	+&reg_usb2_vbus {
	+ status = "okay";
	+};
	+
	+&uart0 {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&uart0_pins_a>;
	+ status = "okay";
	+};
	+
	+&usb_otg {
	+ dr_mode = "otg";
	+ status = "okay";
	+};
	+
	+&usbphy {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
	+ usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
	+ usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
	+ usb0_vbus-supply = <&reg_usb0_vbus>;
	+ usb1_vbus-supply = <&reg_usb1_vbus>;
	+ usb2_vbus-supply = <&reg_usb2_vbus>;
	+ status = "okay";
	};
	Index: sys/gnu/dts/arm/sun4i-a10.dtsi
	===================================================================
	--- sys/gnu/dts/arm/sun4i-a10.dtsi
	+++ sys/gnu/dts/arm/sun4i-a10.dtsi
	@@ -2,18 +2,50 @@
	* Copyright 2012 Stefan Roese
	* Stefan Roese <sr@denx.de>
	*
	- * The code contained herein is licensed under the GNU General Public
	- * License. You may obtain a copy of the GNU General Public License
	- * Version 2 or later at the following locations:
	+ * This file is dual-licensed: you can use it either under the terms
	+ * of the GPL or the X11 license, at your option. Note that this dual
	+ * licensing only applies to this file, and not this project as a
	+ * whole.
	*
	- * http://www.opensource.org/licenses/gpl-license.html
	- * http://www.gnu.org/copyleft/gpl.html
	+ * a) This library is free software; you can redistribute it and/or
	+ * modify it under the terms of the GNU General Public License as
	+ * published by the Free Software Foundation; either version 2 of the
	+ * License, or (at your option) any later version.
	+ *
	+ * This library is distributed in the hope that it will be useful,
	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	+ * GNU General Public License for more details.
	+ *
	+ * Or, alternatively,
	+ *
	+ * b) Permission is hereby granted, free of charge, to any person
	+ * obtaining a copy of this software and associated documentation
	+ * files (the "Software"), to deal in the Software without
	+ * restriction, including without limitation the rights to use,
	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	+ * sell copies of the Software, and to permit persons to whom the
	+ * Software is furnished to do so, subject to the following
	+ * conditions:
	+ *
	+ * The above copyright notice and this permission notice shall be
	+ * included in all copies or substantial portions of the Software.
	+ *
	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	+ * OTHER DEALINGS IN THE SOFTWARE.
	*/

	#include "skeleton.dtsi"

	#include <dt-bindings/thermal/thermal.h>

	+#include <dt-bindings/clock/sun4i-a10-pll2.h>
	#include <dt-bindings/dma/sun4i-a10.h>
	#include <dt-bindings/pinctrl/sun4i-a10.h>

	@@ -30,7 +62,8 @@
	ranges;

	framebuffer@0 {
	- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
	+ compatible = "allwinner,simple-framebuffer",
	+ "simple-framebuffer";
	allwinner,pipeline = "de_be0-lcd0-hdmi";
	clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
	<&ahb_gates 44>;
	@@ -38,7 +71,8 @@
	};

	framebuffer@1 {
	- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
	+ compatible = "allwinner,simple-framebuffer",
	+ "simple-framebuffer";
	allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
	clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
	<&ahb_gates 44>, <&ahb_gates 46>;
	@@ -74,16 +108,15 @@
	clocks = <&cpu>;
	clock-latency = <244144>; /* 8 32k periods */
	operating-points = <
	- /* kHz uV */
	- 1056000 1500000
	+ /* kHz uV */
	1008000 1400000
	- 912000 1350000
	- 864000 1300000
	- 624000 1250000
	+ 912000 1350000
	+ 864000 1300000
	+ 624000 1250000
	>;
	#cooling-cells = <2>;
	cooling-min-level = <0>;
	- cooling-max-level = <4>;
	+ cooling-max-level = <3>;
	};
	};

	@@ -163,6 +196,15 @@
	clock-output-names = "pll1";
	};

	+ pll2: clk@01c20008 {
	+ #clock-cells = <1>;
	+ compatible = "allwinner,sun4i-a10-pll2-clk";
	+ reg = <0x01c20008 0x8>;
	+ clocks = <&osc24M>;
	+ clock-output-names = "pll2-1x", "pll2-2x",
	+ "pll2-4x", "pll2-8x";
	+ };
	+
	pll4: clk@01c20018 {
	#clock-cells = <0>;
	compatible = "allwinner,sun4i-a10-pll1-clk";
	@@ -209,6 +251,7 @@
	compatible = "allwinner,sun4i-a10-axi-gates-clk";
	reg = <0x01c2005c 0x4>;
	clocks = <&axi>;
	+ clock-indices = <0>;
	clock-output-names = "axi_dram";
	};

	@@ -225,17 +268,36 @@
	compatible = "allwinner,sun4i-a10-ahb-gates-clk";
	reg = <0x01c20060 0x8>;
	clocks = <&ahb>;
	+ clock-indices = <0>, <1>,
	+ <2>, <3>,
	+ <4>, <5>, <6>,
	+ <7>, <8>, <9>,
	+ <10>, <11>, <12>,
	+ <13>, <14>, <16>,
	+ <17>, <18>, <20>,
	+ <21>, <22>, <23>,
	+ <24>, <25>, <26>,
	+ <32>, <33>, <34>,
	+ <35>, <36>, <37>,
	+ <40>, <41>, <43>,
	+ <44>, <45>,
	+ <46>, <47>,
	+ <50>, <52>;
	clock-output-names = "ahb_usb0", "ahb_ehci0",
	- "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss",
	- "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1",
	- "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand",
	- "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts",
	- "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3",
	- "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve",
	- "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0",
	- "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi",
	- "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0",
	- "ahb_de_fe1", "ahb_mp", "ahb_mali400";
	+ "ahb_ohci0", "ahb_ehci1",
	+ "ahb_ohci1", "ahb_ss", "ahb_dma",
	+ "ahb_bist", "ahb_mmc0", "ahb_mmc1",
	+ "ahb_mmc2", "ahb_mmc3", "ahb_ms",
	+ "ahb_nand", "ahb_sdram", "ahb_ace",
	+ "ahb_emac", "ahb_ts", "ahb_spi0",
	+ "ahb_spi1", "ahb_spi2", "ahb_spi3",
	+ "ahb_pata", "ahb_sata", "ahb_gps",
	+ "ahb_ve", "ahb_tvd", "ahb_tve0",
	+ "ahb_tve1", "ahb_lcd0", "ahb_lcd1",
	+ "ahb_csi0", "ahb_csi1", "ahb_hdmi",
	+ "ahb_de_be0", "ahb_de_be1",
	+ "ahb_de_fe0", "ahb_de_fe1",
	+ "ahb_mp", "ahb_mali400";
	};

	apb0: apb0@01c20054 {
	@@ -251,9 +313,14 @@
	compatible = "allwinner,sun4i-a10-apb0-gates-clk";
	reg = <0x01c20068 0x4>;
	clocks = <&apb0>;
	+ clock-indices = <0>, <1>,
	+ <2>, <3>,
	+ <5>, <6>,
	+ <7>, <10>;
	clock-output-names = "apb0_codec", "apb0_spdif",
	- "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0",
	- "apb0_ir1", "apb0_keypad";
	+ "apb0_ac97", "apb0_iis",
	+ "apb0_pio", "apb0_ir0",
	+ "apb0_ir1", "apb0_keypad";
	};

	apb1: clk@01c20058 {
	@@ -269,12 +336,22 @@
	compatible = "allwinner,sun4i-a10-apb1-gates-clk";
	reg = <0x01c2006c 0x4>;
	clocks = <&apb1>;
	+ clock-indices = <0>, <1>,
	+ <2>, <4>,
	+ <5>, <6>,
	+ <7>, <16>,
	+ <17>, <18>,
	+ <19>, <20>,
	+ <21>, <22>,
	+ <23>;
	clock-output-names = "apb1_i2c0", "apb1_i2c1",
	- "apb1_i2c2", "apb1_can", "apb1_scr",
	- "apb1_ps20", "apb1_ps21", "apb1_uart0",
	- "apb1_uart1", "apb1_uart2", "apb1_uart3",
	- "apb1_uart4", "apb1_uart5", "apb1_uart6",
	- "apb1_uart7";
	+ "apb1_i2c2", "apb1_can",
	+ "apb1_scr", "apb1_ps20",
	+ "apb1_ps21", "apb1_uart0",
	+ "apb1_uart1", "apb1_uart2",
	+ "apb1_uart3", "apb1_uart4",
	+ "apb1_uart5", "apb1_uart6",
	+ "apb1_uart7";
	};

	nand_clk: clk@01c20080 {
	@@ -399,11 +476,12 @@

	usb_clk: clk@01c200cc {
	#clock-cells = <1>;
	- #reset-cells = <1>;
	+ #reset-cells = <1>;
	compatible = "allwinner,sun4i-a10-usb-clk";
	reg = <0x01c200cc 0x4>;
	clocks = <&pll6 1>;
	- clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy";
	+ clock-output-names = "usb_ohci0", "usb_ohci1",
	+ "usb_phy";
	};

	spi3_clk: clk@01c200d4 {
	@@ -413,6 +491,14 @@
	clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
	clock-output-names = "spi3";
	};
	+
	+ codec_clk: clk@01c20140 {
	+ #clock-cells = <0>;
	+ compatible = "allwinner,sun4i-a10-codec-clk";
	+ reg = <0x01c20140 0x4>;
	+ clocks = <&pll2 SUN4I_A10_PLL2_1X>;
	+ clock-output-names = "codec";
	+ };
	};

	soc@01c00000 {
	@@ -421,6 +507,42 @@
	#size-cells = <1>;
	ranges;

	+ sram-controller@01c00000 {
	+ compatible = "allwinner,sun4i-a10-sram-controller";
	+ reg = <0x01c00000 0x30>;
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ ranges;
	+
	+ sram_a: sram@00000000 {
	+ compatible = "mmio-sram";
	+ reg = <0x00000000 0xc000>;
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ ranges = <0 0x00000000 0xc000>;
	+
	+ emac_sram: sram-section@8000 {
	+ compatible = "allwinner,sun4i-a10-sram-a3-a4";
	+ reg = <0x8000 0x4000>;
	+ status = "disabled";
	+ };
	+ };
	+
	+ sram_d: sram@00010000 {
	+ compatible = "mmio-sram";
	+ reg = <0x00010000 0x1000>;
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ ranges = <0 0x00010000 0x1000>;
	+
	+ otg_sram: sram-section@0000 {
	+ compatible = "allwinner,sun4i-a10-sram-d";
	+ reg = <0x0000 0x1000>;
	+ status = "disabled";
	+ };
	+ };
	+ };
	+
	dma: dma-controller@01c02000 {
	compatible = "allwinner,sun4i-a10-dma";
	reg = <0x01c02000 0x1000>;
	@@ -462,6 +584,7 @@
	reg = <0x01c0b000 0x1000>;
	interrupts = <55>;
	clocks = <&ahb_gates 17>;
	+ allwinner,sram = <&emac_sram 1>;
	status = "disabled";
	};

	@@ -486,6 +609,8 @@
	"sample";
	interrupts = <32>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	};

	mmc1: mmc@01c10000 {
	@@ -501,6 +626,8 @@
	"sample";
	interrupts = <33>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	};

	mmc2: mmc@01c11000 {
	@@ -516,6 +643,8 @@
	"sample";
	interrupts = <34>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	};

	mmc3: mmc@01c12000 {
	@@ -531,6 +660,21 @@
	"sample";
	interrupts = <35>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	+ };
	+
	+ usb_otg: usb@01c13000 {
	+ compatible = "allwinner,sun4i-a10-musb";
	+ reg = <0x01c13000 0x0400>;
	+ clocks = <&ahb_gates 0>;
	+ interrupts = <38>;
	+ interrupt-names = "mc";
	+ phys = <&usbphy 0>;
	+ phy-names = "usb";
	+ extcon = <&usbphy 0>;
	+ allwinner,sram = <&otg_sram 1>;
	+ status = "disabled";
	};

	usbphy: phy@01c13400 {
	@@ -565,6 +709,14 @@
	status = "disabled";
	};

	+ crypto: crypto-engine@01c15000 {
	+ compatible = "allwinner,sun4i-a10-crypto";
	+ reg = <0x01c15000 0x1000>;
	+ interrupts = <86>;
	+ clocks = <&ahb_gates 5>, <&ss_clk>;
	+ clock-names = "ahb", "mod";
	+ };
	+
	spi2: spi@01c17000 {
	compatible = "allwinner,sun4i-a10-spi";
	reg = <0x01c17000 0x1000>;
	@@ -635,8 +787,7 @@
	clocks = <&apb0_gates 5>;
	gpio-controller;
	interrupt-controller;
	- #interrupt-cells = <2>;
	- #size-cells = <0>;
	+ #interrupt-cells = <3>;
	#gpio-cells = <3>;

	pwm0_pins_a: pwm0@0 {
	@@ -707,7 +858,8 @@
	};

	mmc0_pins_a: mmc0@0 {
	- allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
	+ allwinner,pins = "PF0", "PF1", "PF2",
	+ "PF3", "PF4", "PF5";
	allwinner,function = "mmc0";
	allwinner,drive = <SUN4I_PINCTRL_30_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	@@ -720,43 +872,85 @@
	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
	};

	- ir0_pins_a: ir0@0 {
	- allwinner,pins = "PB3","PB4";
	+ ir0_rx_pins_a: ir0@0 {
	+ allwinner,pins = "PB4";
	+ allwinner,function = "ir0";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ ir0_tx_pins_a: ir0@1 {
	+ allwinner,pins = "PB3";
	allwinner,function = "ir0";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	- ir1_pins_a: ir1@0 {
	- allwinner,pins = "PB22","PB23";
	+ ir1_rx_pins_a: ir1@0 {
	+ allwinner,pins = "PB23";
	+ allwinner,function = "ir1";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ ir1_tx_pins_a: ir1@1 {
	+ allwinner,pins = "PB22";
	allwinner,function = "ir1";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	spi0_pins_a: spi0@0 {
	- allwinner,pins = "PI10", "PI11", "PI12", "PI13";
	+ allwinner,pins = "PI11", "PI12", "PI13";
	+ allwinner,function = "spi0";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi0_cs0_pins_a: spi0_cs0@0 {
	+ allwinner,pins = "PI10";
	allwinner,function = "spi0";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	spi1_pins_a: spi1@0 {
	- allwinner,pins = "PI16", "PI17", "PI18", "PI19";
	+ allwinner,pins = "PI17", "PI18", "PI19";
	+ allwinner,function = "spi1";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi1_cs0_pins_a: spi1_cs0@0 {
	+ allwinner,pins = "PI16";
	allwinner,function = "spi1";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	spi2_pins_a: spi2@0 {
	- allwinner,pins = "PB14", "PB15", "PB16", "PB17";
	+ allwinner,pins = "PC20", "PC21", "PC22";
	allwinner,function = "spi2";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	spi2_pins_b: spi2@1 {
	- allwinner,pins = "PC19", "PC20", "PC21", "PC22";
	+ allwinner,pins = "PB15", "PB16", "PB17";
	+ allwinner,function = "spi2";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi2_cs0_pins_a: spi2_cs0@0 {
	+ allwinner,pins = "PC19";
	+ allwinner,function = "spi2";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi2_cs0_pins_b: spi2_cs0@1 {
	+ allwinner,pins = "PB14";
	allwinner,function = "spi2";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	@@ -828,6 +1022,19 @@
	status = "disabled";
	};

	+ codec: codec@01c22c00 {
	+ #sound-dai-cells = <0>;
	+ compatible = "allwinner,sun4i-a10-codec";
	+ reg = <0x01c22c00 0x40>;
	+ interrupts = <30>;
	+ clocks = <&apb0_gates 0>, <&codec_clk>;
	+ clock-names = "apb", "codec";
	+ dmas = <&dma SUN4I_DMA_NORMAL 19>,
	+ <&dma SUN4I_DMA_NORMAL 19>;
	+ dma-names = "rx", "tx";
	+ status = "disabled";
	+ };
	+
	sid: eeprom@01c23800 {
	compatible = "allwinner,sun4i-a10-sid";
	reg = <0x01c23800 0x10>;
	Index: sys/gnu/dts/arm/sun7i-a20-olimex-som-evb.dts
	===================================================================
	--- /dev/null
	+++ sys/gnu/dts/arm/sun7i-a20-olimex-som-evb.dts
	@@ -0,0 +1,198 @@
	+/*
	+ * Copyright 2015 - Marcus Cooper <codekipper@gmail.com>
	+ *
	+ * This file is dual-licensed: you can use it either under the terms
	+ * of the GPL or the X11 license, at your option. Note that this dual
	+ * licensing only applies to this file, and not this project as a
	+ * whole.
	+ *
	+ * a) This file is free software; you can redistribute it and/or
	+ * modify it under the terms of the GNU General Public License as
	+ * published by the Free Software Foundation; either version 2 of the
	+ * License, or (at your option) any later version.
	+ *
	+ * This file is distributed in the hope that it will be useful,
	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	+ * GNU General Public License for more details.
	+ *
	+ * Or, alternatively,
	+ *
	+ * b) Permission is hereby granted, free of charge, to any person
	+ * obtaining a copy of this software and associated documentation
	+ * files (the "Software"), to deal in the Software without
	+ * restriction, including without limitation the rights to use,
	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	+ * sell copies of the Software, and to permit persons to whom the
	+ * Software is furnished to do so, subject to the following
	+ * conditions:
	+ *
	+ * The above copyright notice and this permission notice shall be
	+ * included in all copies or substantial portions of the Software.
	+ *
	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	+ * OTHER DEALINGS IN THE SOFTWARE.
	+ */
	+
	+/dts-v1/;
	+#include "sun7i-a20.dtsi"
	+#include "sunxi-common-regulators.dtsi"
	+
	+#include <dt-bindings/gpio/gpio.h>
	+#include <dt-bindings/interrupt-controller/irq.h>
	+#include <dt-bindings/pinctrl/sun4i-a10.h>
	+
	+/ {
	+ model = "Olimex A20-Olimex-SOM-EVB";
	+ compatible = "olimex,a20-olimex-som-evb", "allwinner,sun7i-a20";
	+
	+ aliases {
	+ serial0 = &uart0;
	+ };
	+
	+ chosen {
	+ stdout-path = "serial0:115200n8";
	+ };
	+
	+ leds {
	+ compatible = "gpio-leds";
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&led_pins_olimex_som_evb>;
	+
	+ green {
	+ label = "a20-olimex-som-evb:green:usr";
	+ gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>;
	+ default-state = "on";
	+ };
	+ };
	+};
	+
	+&ahci {
	+ target-supply = <&reg_ahci_5v>;
	+ status = "okay";
	+};
	+
	+&ehci0 {
	+ status = "okay";
	+};
	+
	+&ehci1 {
	+ status = "okay";
	+};
	+
	+&gmac {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&gmac_pins_rgmii_a>;
	+ phy = <&phy1>;
	+ phy-mode = "rgmii";
	+ status = "okay";
	+
	+ phy1: ethernet-phy@1 {
	+ reg = <1>;
	+ };
	+};
	+
	+&i2c0 {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&i2c0_pins_a>;
	+ status = "okay";
	+
	+ axp209: pmic@34 {
	+ reg = <0x34>;
	+ interrupt-parent = <&nmi_intc>;
	+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	+ };
	+};
	+
	+&mmc0 {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
	+ vmmc-supply = <&reg_vcc3v3>;
	+ bus-width = <4>;
	+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
	+ cd-inverted;
	+ status = "okay";
	+};
	+
	+&ohci0 {
	+ status = "okay";
	+};
	+
	+&ohci1 {
	+ status = "okay";
	+};
	+
	+&pio {
	+ ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {
	+ allwinner,pins = "PC3";
	+ allwinner,function = "gpio_out";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ led_pins_olimex_som_evb: led_pins@0 {
	+ allwinner,pins = "PH2";
	+ allwinner,function = "gpio_out";
	+ allwinner,drive = <SUN4I_PINCTRL_20_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+};
	+
	+&reg_ahci_5v {
	+ pinctrl-0 = <&ahci_pwr_pin_olimex_som_evb>;
	+ gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
	+ status = "okay";
	+};
	+
	+#include "axp209.dtsi"
	+
	+&reg_dcdc2 {
	+ regulator-always-on;
	+ regulator-min-microvolt = <1000000>;
	+ regulator-max-microvolt = <1400000>;
	+ regulator-name = "vdd-cpu";
	+};
	+
	+&reg_dcdc3 {
	+ regulator-always-on;
	+ regulator-min-microvolt = <1000000>;
	+ regulator-max-microvolt = <1400000>;
	+ regulator-name = "vdd-int-dll";
	+};
	+
	+&reg_ldo1 {
	+ regulator-name = "vdd-rtc";
	+};
	+
	+&reg_ldo2 {
	+ regulator-always-on;
	+ regulator-min-microvolt = <3000000>;
	+ regulator-max-microvolt = <3000000>;
	+ regulator-name = "avcc";
	+};
	+
	+&reg_usb1_vbus {
	+ status = "okay";
	+};
	+
	+&reg_usb2_vbus {
	+ status = "okay";
	+};
	+
	+&uart0 {
	+ pinctrl-names = "default";
	+ pinctrl-0 = <&uart0_pins_a>;
	+ status = "okay";
	+};
	+
	+&usbphy {
	+ usb1_vbus-supply = <&reg_usb1_vbus>;
	+ usb2_vbus-supply = <&reg_usb2_vbus>;
	+ status = "okay";
	+};
	Index: sys/gnu/dts/arm/sun7i-a20.dtsi
	===================================================================
	--- sys/gnu/dts/arm/sun7i-a20.dtsi
	+++ sys/gnu/dts/arm/sun7i-a20.dtsi
	@@ -18,11 +18,6 @@
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*
	- * You should have received a copy of the GNU General Public
	- * License along with this file; if not, write to the Free
	- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
	- * MA 02110-1301 USA
	- *
	* Or, alternatively,
	*
	* b) Permission is hereby granted, free of charge, to any person
	@@ -52,6 +47,7 @@
	#include <dt-bindings/interrupt-controller/arm-gic.h>
	#include <dt-bindings/thermal/thermal.h>

	+#include <dt-bindings/clock/sun4i-a10-pll2.h>
	#include <dt-bindings/dma/sun4i-a10.h>
	#include <dt-bindings/pinctrl/sun4i-a10.h>

	@@ -68,7 +64,8 @@
	ranges;

	framebuffer@0 {
	- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
	+ compatible = "allwinner,simple-framebuffer",
	+ "simple-framebuffer";
	allwinner,pipeline = "de_be0-lcd0-hdmi";
	clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
	<&ahb_gates 44>;
	@@ -104,19 +101,18 @@
	clocks = <&cpu>;
	clock-latency = <244144>; /* 8 32k periods */
	operating-points = <
	- /* kHz uV */
	- 1008000 1450000
	- 960000 1400000
	- 912000 1400000
	- 864000 1300000
	- 720000 1200000
	- 528000 1100000
	- 312000 1000000
	- 144000 900000
	+ /* kHz uV */
	+ 960000 1400000
	+ 912000 1400000
	+ 864000 1300000
	+ 720000 1200000
	+ 528000 1100000
	+ 312000 1000000
	+ 144000 1000000
	>;
	#cooling-cells = <2>;
	cooling-min-level = <0>;
	- cooling-max-level = <7>;
	+ cooling-max-level = <6>;
	};

	cpu@1 {
	@@ -204,6 +200,15 @@
	clock-output-names = "pll1";
	};

	+ pll2: clk@01c20008 {
	+ #clock-cells = <1>;
	+ compatible = "allwinner,sun4i-a10-pll2-clk";
	+ reg = <0x01c20008 0x8>;
	+ clocks = <&osc24M>;
	+ clock-output-names = "pll2-1x", "pll2-2x",
	+ "pll2-4x", "pll2-8x";
	+ };
	+
	pll4: clk@01c20018 {
	#clock-cells = <0>;
	compatible = "allwinner,sun7i-a20-pll4-clk";
	@@ -225,7 +230,8 @@
	compatible = "allwinner,sun4i-a10-pll6-clk";
	reg = <0x01c20028 0x4>;
	clocks = <&osc24M>;
	- clock-output-names = "pll6_sata", "pll6_other", "pll6";
	+ clock-output-names = "pll6_sata", "pll6_other", "pll6",
	+ "pll6_div_4";
	};

	pll8: clk@01c20040 {
	@@ -254,10 +260,16 @@

	ahb: ahb@01c20054 {
	#clock-cells = <0>;
	- compatible = "allwinner,sun4i-a10-ahb-clk";
	+ compatible = "allwinner,sun5i-a13-ahb-clk";
	reg = <0x01c20054 0x4>;
	- clocks = <&axi>;
	+ clocks = <&axi>, <&pll6 3>, <&pll6 1>;
	clock-output-names = "ahb";
	+ /*
	+ * Use PLL6 as parent, instead of CPU/AXI
	+ * which has rate changes due to cpufreq
	+ */
	+ assigned-clocks = <&ahb>;
	+ assigned-clock-parents = <&pll6 3>;
	};

	ahb_gates: clk@01c20060 {
	@@ -265,6 +277,19 @@
	compatible = "allwinner,sun7i-a20-ahb-gates-clk";
	reg = <0x01c20060 0x8>;
	clocks = <&ahb>;
	+ clock-indices = <0>, <1>,
	+ <2>, <3>, <4>,
	+ <5>, <6>, <7>, <8>,
	+ <9>, <10>, <11>, <12>,
	+ <13>, <14>, <16>,
	+ <17>, <18>, <20>, <21>,
	+ <22>, <23>, <25>,
	+ <28>, <32>, <33>, <34>,
	+ <35>, <36>, <37>, <40>,
	+ <41>, <42>, <43>,
	+ <44>, <45>, <46>,
	+ <47>, <49>, <50>,
	+ <52>;
	clock-output-names = "ahb_usb0", "ahb_ehci0",
	"ahb_ohci0", "ahb_ehci1", "ahb_ohci1",
	"ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
	@@ -293,6 +318,10 @@
	compatible = "allwinner,sun7i-a20-apb0-gates-clk";
	reg = <0x01c20068 0x4>;
	clocks = <&apb0>;
	+ clock-indices = <0>, <1>,
	+ <2>, <3>, <4>,
	+ <5>, <6>, <7>,
	+ <8>, <10>;
	clock-output-names = "apb0_codec", "apb0_spdif",
	"apb0_ac97", "apb0_iis0", "apb0_iis1",
	"apb0_pio", "apb0_ir0", "apb0_ir1",
	@@ -312,6 +341,12 @@
	compatible = "allwinner,sun7i-a20-apb1-gates-clk";
	reg = <0x01c2006c 0x4>;
	clocks = <&apb1>;
	+ clock-indices = <0>, <1>,
	+ <2>, <3>, <4>,
	+ <5>, <6>, <7>,
	+ <15>, <16>, <17>,
	+ <18>, <19>, <20>,
	+ <21>, <22>, <23>;
	clock-output-names = "apb1_i2c0", "apb1_i2c1",
	"apb1_i2c2", "apb1_i2c3", "apb1_can",
	"apb1_scr", "apb1_ps20", "apb1_ps21",
	@@ -440,13 +475,22 @@
	clock-output-names = "ir1";
	};

	+ keypad_clk: clk@01c200c4 {
	+ #clock-cells = <0>;
	+ compatible = "allwinner,sun4i-a10-mod0-clk";
	+ reg = <0x01c200c4 0x4>;
	+ clocks = <&osc24M>;
	+ clock-output-names = "keypad";
	+ };
	+
	usb_clk: clk@01c200cc {
	#clock-cells = <1>;
	- #reset-cells = <1>;
	+ #reset-cells = <1>;
	compatible = "allwinner,sun4i-a10-usb-clk";
	reg = <0x01c200cc 0x4>;
	clocks = <&pll6 1>;
	- clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy";
	+ clock-output-names = "usb_ohci0", "usb_ohci1",
	+ "usb_phy";
	};

	spi3_clk: clk@01c200d4 {
	@@ -457,6 +501,14 @@
	clock-output-names = "spi3";
	};

	+ codec_clk: clk@01c20140 {
	+ #clock-cells = <0>;
	+ compatible = "allwinner,sun4i-a10-codec-clk";
	+ reg = <0x01c20140 0x4>;
	+ clocks = <&pll2 SUN4I_A10_PLL2_1X>;
	+ clock-output-names = "codec";
	+ };
	+
	mbus_clk: clk@01c2015c {
	#clock-cells = <0>;
	compatible = "allwinner,sun5i-a13-mbus-clk";
	@@ -466,10 +518,13 @@
	};

	/*
	- * The following two are dummy clocks, placeholders used in the gmac_tx
	- * clock. The gmac driver will choose one parent depending on the PHY
	- * interface mode, using clk_set_rate auto-reparenting.
	- * The actual TX clock rate is not controlled by the gmac_tx clock.
	+ * The following two are dummy clocks, placeholders
	+ * used in the gmac_tx clock. The gmac driver will
	+ * choose one parent depending on the PHY interface
	+ * mode, using clk_set_rate auto-reparenting.
	+ *
	+ * The actual TX clock rate is not controlled by the
	+ * gmac_tx clock.
	*/
	mii_phy_tx_clk: clk@2 {
	#clock-cells = <0>;
	@@ -528,6 +583,42 @@
	#size-cells = <1>;
	ranges;

	+ sram-controller@01c00000 {
	+ compatible = "allwinner,sun4i-a10-sram-controller";
	+ reg = <0x01c00000 0x30>;
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ ranges;
	+
	+ sram_a: sram@00000000 {
	+ compatible = "mmio-sram";
	+ reg = <0x00000000 0xc000>;
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ ranges = <0 0x00000000 0xc000>;
	+
	+ emac_sram: sram-section@8000 {
	+ compatible = "allwinner,sun4i-a10-sram-a3-a4";
	+ reg = <0x8000 0x4000>;
	+ status = "disabled";
	+ };
	+ };
	+
	+ sram_d: sram@00010000 {
	+ compatible = "mmio-sram";
	+ reg = <0x00010000 0x1000>;
	+ #address-cells = <1>;
	+ #size-cells = <1>;
	+ ranges = <0 0x00010000 0x1000>;
	+
	+ otg_sram: sram-section@0000 {
	+ compatible = "allwinner,sun4i-a10-sram-d";
	+ reg = <0x0000 0x1000>;
	+ status = "disabled";
	+ };
	+ };
	+ };
	+
	nmi_intc: interrupt-controller@01c00030 {
	compatible = "allwinner,sun7i-a20-sc-nmi";
	interrupt-controller;
	@@ -577,6 +668,7 @@
	reg = <0x01c0b000 0x1000>;
	interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&ahb_gates 17>;
	+ allwinner,sram = <&emac_sram 1>;
	status = "disabled";
	};

	@@ -601,6 +693,8 @@
	"sample";
	interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	};

	mmc1: mmc@01c10000 {
	@@ -616,6 +710,8 @@
	"sample";
	interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	};

	mmc2: mmc@01c11000 {
	@@ -631,6 +727,8 @@
	"sample";
	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	};

	mmc3: mmc@01c12000 {
	@@ -646,6 +744,21 @@
	"sample";
	interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
	status = "disabled";
	+ #address-cells = <1>;
	+ #size-cells = <0>;
	+ };
	+
	+ usb_otg: usb@01c13000 {
	+ compatible = "allwinner,sun4i-a10-musb";
	+ reg = <0x01c13000 0x0400>;
	+ clocks = <&ahb_gates 0>;
	+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
	+ interrupt-names = "mc";
	+ phys = <&usbphy 0>;
	+ phy-names = "usb";
	+ extcon = <&usbphy 0>;
	+ allwinner,sram = <&otg_sram 1>;
	+ status = "disabled";
	};

	usbphy: phy@01c13400 {
	@@ -680,6 +793,14 @@
	status = "disabled";
	};

	+ crypto: crypto-engine@01c15000 {
	+ compatible = "allwinner,sun4i-a10-crypto";
	+ reg = <0x01c15000 0x1000>;
	+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
	+ clocks = <&ahb_gates 5>, <&ss_clk>;
	+ clock-names = "ahb", "mod";
	+ };
	+
	spi2: spi@01c17000 {
	compatible = "allwinner,sun4i-a10-spi";
	reg = <0x01c17000 0x1000>;
	@@ -743,8 +864,7 @@
	clocks = <&apb0_gates 5>;
	gpio-controller;
	interrupt-controller;
	- #interrupt-cells = <2>;
	- #size-cells = <0>;
	+ #interrupt-cells = <3>;
	#gpio-cells = <3>;

	pwm0_pins_a: pwm0@0 {
	@@ -796,6 +916,13 @@
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	+ uart4_pins_b: uart4@1 {
	+ allwinner,pins = "PH4", "PH5";
	+ allwinner,function = "uart4";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	uart5_pins_a: uart5@0 {
	allwinner,pins = "PI10", "PI11";
	allwinner,function = "uart5";
	@@ -897,35 +1024,71 @@
	};

	spi0_pins_a: spi0@0 {
	- allwinner,pins = "PI10", "PI11", "PI12", "PI13", "PI14";
	+ allwinner,pins = "PI11", "PI12", "PI13";
	+ allwinner,function = "spi0";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi0_cs0_pins_a: spi0_cs0@0 {
	+ allwinner,pins = "PI10";
	+ allwinner,function = "spi0";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi0_cs1_pins_a: spi0_cs1@0 {
	+ allwinner,pins = "PI14";
	allwinner,function = "spi0";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	spi1_pins_a: spi1@0 {
	- allwinner,pins = "PI16", "PI17", "PI18", "PI19";
	+ allwinner,pins = "PI17", "PI18", "PI19";
	+ allwinner,function = "spi1";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi1_cs0_pins_a: spi1_cs0@0 {
	+ allwinner,pins = "PI16";
	allwinner,function = "spi1";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	spi2_pins_a: spi2@0 {
	- allwinner,pins = "PC19", "PC20", "PC21", "PC22";
	+ allwinner,pins = "PC20", "PC21", "PC22";
	allwinner,function = "spi2";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	spi2_pins_b: spi2@1 {
	- allwinner,pins = "PB14", "PB15", "PB16", "PB17";
	+ allwinner,pins = "PB15", "PB16", "PB17";
	+ allwinner,function = "spi2";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi2_cs0_pins_a: spi2_cs0@0 {
	+ allwinner,pins = "PC19";
	+ allwinner,function = "spi2";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ spi2_cs0_pins_b: spi2_cs0@1 {
	+ allwinner,pins = "PB14";
	allwinner,function = "spi2";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	mmc0_pins_a: mmc0@0 {
	- allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
	+ allwinner,pins = "PF0", "PF1", "PF2",
	+ "PF3", "PF4", "PF5";
	allwinner,function = "mmc0";
	allwinner,drive = <SUN4I_PINCTRL_30_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	@@ -939,28 +1102,44 @@
	};

	mmc2_pins_a: mmc2@0 {
	- allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11";
	+ allwinner,pins = "PC6", "PC7", "PC8",
	+ "PC9", "PC10", "PC11";
	allwinner,function = "mmc2";
	allwinner,drive = <SUN4I_PINCTRL_30_MA>;
	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
	};

	mmc3_pins_a: mmc3@0 {
	- allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
	+ allwinner,pins = "PI4", "PI5", "PI6",
	+ "PI7", "PI8", "PI9";
	allwinner,function = "mmc3";
	allwinner,drive = <SUN4I_PINCTRL_30_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	- ir0_pins_a: ir0@0 {
	- allwinner,pins = "PB3","PB4";
	+ ir0_rx_pins_a: ir0@0 {
	+ allwinner,pins = "PB4";
	allwinner,function = "ir0";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};

	- ir1_pins_a: ir1@0 {
	- allwinner,pins = "PB22","PB23";
	+ ir0_tx_pins_a: ir0@1 {
	+ allwinner,pins = "PB3";
	+ allwinner,function = "ir0";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ ir1_rx_pins_a: ir1@0 {
	+ allwinner,pins = "PB23";
	+ allwinner,function = "ir1";
	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	+ };
	+
	+ ir1_tx_pins_a: ir1@1 {
	+ allwinner,pins = "PB22";
	allwinner,function = "ir1";
	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	@@ -1037,13 +1216,26 @@
	status = "disabled";
	};

	+ codec: codec@01c22c00 {
	+ #sound-dai-cells = <0>;
	+ compatible = "allwinner,sun7i-a20-codec";
	+ reg = <0x01c22c00 0x40>;
	+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
	+ clocks = <&apb0_gates 0>, <&codec_clk>;
	+ clock-names = "apb", "codec";
	+ dmas = <&dma SUN4I_DMA_NORMAL 19>,
	+ <&dma SUN4I_DMA_NORMAL 19>;
	+ dma-names = "rx", "tx";
	+ status = "disabled";
	+ };
	+
	sid: eeprom@01c23800 {
	compatible = "allwinner,sun7i-a20-sid";
	reg = <0x01c23800 0x200>;
	};

	rtp: rtp@01c25000 {
	- compatible = "allwinner,sun4i-a10-ts";
	+ compatible = "allwinner,sun5i-a13-ts";
	reg = <0x01c25000 0x100>;
	interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
	#thermal-sensor-cells = <0>;
	@@ -1130,7 +1322,8 @@
	};

	i2c0: i2c@01c2ac00 {
	- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
	+ compatible = "allwinner,sun7i-a20-i2c",
	+ "allwinner,sun4i-a10-i2c";
	reg = <0x01c2ac00 0x400>;
	interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&apb1_gates 0>;
	@@ -1140,7 +1333,8 @@
	};

	i2c1: i2c@01c2b000 {
	- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
	+ compatible = "allwinner,sun7i-a20-i2c",
	+ "allwinner,sun4i-a10-i2c";
	reg = <0x01c2b000 0x400>;
	interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&apb1_gates 1>;
	@@ -1150,7 +1344,8 @@
	};

	i2c2: i2c@01c2b400 {
	- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
	+ compatible = "allwinner,sun7i-a20-i2c",
	+ "allwinner,sun4i-a10-i2c";
	reg = <0x01c2b400 0x400>;
	interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&apb1_gates 2>;
	@@ -1160,7 +1355,8 @@
	};

	i2c3: i2c@01c2b800 {
	- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
	+ compatible = "allwinner,sun7i-a20-i2c",
	+ "allwinner,sun4i-a10-i2c";
	reg = <0x01c2b800 0x400>;
	interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&apb1_gates 3>;
	@@ -1170,7 +1366,8 @@
	};

	i2c4: i2c@01c2c000 {
	- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
	+ compatible = "allwinner,sun7i-a20-i2c",
	+ "allwinner,sun4i-a10-i2c";
	reg = <0x01c2c000 0x400>;
	interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&apb1_gates 15>;
	Index: sys/gnu/dts/include/dt-bindings/clock/sun4i-a10-pll2.h
	===================================================================
	--- /dev/null
	+++ sys/gnu/dts/include/dt-bindings/clock/sun4i-a10-pll2.h
	@@ -0,0 +1,53 @@
	+/*
	+ * Copyright 2015 Maxime Ripard
	+ *
	+ * Maxime Ripard <maxime.ripard@free-electrons.com>
	+ *
	+ * This file is dual-licensed: you can use it either under the terms
	+ * of the GPL or the X11 license, at your option. Note that this dual
	+ * licensing only applies to this file, and not this project as a
	+ * whole.
	+ *
	+ * a) This file is free software; you can redistribute it and/or
	+ * modify it under the terms of the GNU General Public License as
	+ * published by the Free Software Foundation; either version 2 of the
	+ * License, or (at your option) any later version.
	+ *
	+ * This file is distributed in the hope that it will be useful,
	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	+ * GNU General Public License for more details.
	+ *
	+ * Or, alternatively,
	+ *
	+ * b) Permission is hereby granted, free of charge, to any person
	+ * obtaining a copy of this software and associated documentation
	+ * files (the "Software"), to deal in the Software without
	+ * restriction, including without limitation the rights to use,
	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	+ * sell copies of the Software, and to permit persons to whom the
	+ * Software is furnished to do so, subject to the following
	+ * conditions:
	+ *
	+ * The above copyright notice and this permission notice shall be
	+ * included in all copies or substantial portions of the Software.
	+ *
	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	+ * OTHER DEALINGS IN THE SOFTWARE.
	+ */
	+
	+#ifndef __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_
	+#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_
	+
	+#define SUN4I_A10_PLL2_1X 0
	+#define SUN4I_A10_PLL2_2X 1
	+#define SUN4I_A10_PLL2_4X 2
	+#define SUN4I_A10_PLL2_8X 3
	+
	+#endif /* __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_ */
	Index: sys/modules/dtb/allwinner/Makefile
	===================================================================
	--- sys/modules/dtb/allwinner/Makefile
	+++ sys/modules/dtb/allwinner/Makefile
	@@ -3,6 +3,8 @@
	DTS= \
	bananapi.dts \
	cubieboard.dts \
	- cubieboard2.dts
	+ cubieboard2.dts \
	+ olimex-a20-som-evb.dts \
	+ olinuxino-lime.dts

	.include <bsd.dtb.mk>

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