D55857.id173699.diff
No OneTemporary
Actions

Size

1 KB

Referenced Files

None

Subscribers

None

D55857.id173699.diff
View Options

	diff --git a/sys/x86/x86/io_apic.c b/sys/x86/x86/io_apic.c
	--- a/sys/x86/x86/io_apic.c
	+++ b/sys/x86/x86/io_apic.c
	@@ -269,6 +269,13 @@
	mtx_lock_spin(&icu_lock);
	if (intpin->io_masked) {
	flags = intpin->io_lowreg & ~IOART_INTMASK;
	+ if (intpin->io_cpu > IOAPIC_MAX_ID) {
	+ /*
	+ * Can't route to desired CPU; keep masked in hardware
	+ * despite request to enable.
	+ */
	+ flags \|= IOART_INTMSET;
	+ }
	ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin),
	flags);
	intpin->io_masked = 0;
	@@ -361,10 +368,18 @@
	/*
	* Set the destination. Note that with Intel interrupt remapping,
	* the previously reserved bits 55:48 now have a purpose so ensure
	- * these are zero.
	+ * these are zero. If the CPU number (in fact, APIC ID) is too
	+ * large, mask the interrupt, and set it to target CPU #0.
	*/
	- low = IOART_DESTPHY;
	- high = intpin->io_cpu << APIC_ID_SHIFT;
	+ if (intpin->io_cpu <= IOAPIC_MAX_ID) {
	+ low = IOART_DESTPHY;
	+ high = intpin->io_cpu << APIC_ID_SHIFT;
	+ } else {
	+ printf("%s: unsupported destination APIC ID %u\n",
	+ __func__, intpin->io_cpu);
	+ low = IOART_DESTPHY \| IOART_INTMSET;
	+ high = 0 << APIC_ID_SHIFT;
	+ }

	/* Program the rest of the low word. */
	if (intpin->io_edgetrigger)