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diff --git a/sys/x86/include/cputypes.h b/sys/x86/include/cputypes.h
--- a/sys/x86/include/cputypes.h
+++ b/sys/x86/include/cputypes.h
@@ -45,4 +45,16 @@
#define CPU_VENDOR_CENTAUR CPU_VENDOR_IDT
#define CPU_VENDOR_HYGON 0x1d94 /* Hygon */
+#define CPU_AMD_ZEN1 0x00
+#define CPU_AMD_ZEN2 0x01
+#define CPU_AMD_ZEN3 0x02
+#define CPU_AMD_ZEN4 0x03
+#define CPU_AMD_ZEN5 0x04
+#define CPU_AMD_ZEN6 0x05
+#define CPU_AMD_UNKNOWN 0xffffffff
+
+#ifdef _KERNEL
+u_int ident_zen_cpu(void);
+#endif
+
#endif /* !_X86_CPUTYPES_H_ */
diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c
--- a/sys/x86/x86/identcpu.c
+++ b/sys/x86/x86/identcpu.c
@@ -64,6 +64,7 @@
#include <machine/specialreg.h>
#include <amd64/vmm/intel/vmx_controls.h>
+#include <x86/cputypes.h>
#include <x86/isa/icu.h>
#include <x86/vmware.h>
@@ -2690,3 +2691,49 @@
#endif
return ((1ULL << cpu_maxphyaddr) - 1);
}
+
+const static struct {
+ u_int family;
+ u_int model_min;
+ u_int model_max;
+ u_int generation;
+} zen_idents[] = {
+ { .family = 0x17, .model_min = 0x00, .model_max = 0x2f, .generation = CPU_AMD_ZEN1 },
+ { .family = 0x17, .model_min = 0x50, .model_max = 0x5f, .generation = CPU_AMD_ZEN1 },
+ { .family = 0x17, .model_min = 0x30, .model_max = 0x4f, .generation = CPU_AMD_ZEN2 },
+ { .family = 0x17, .model_min = 0x60, .model_max = 0x7f, .generation = CPU_AMD_ZEN2 },
+ { .family = 0x17, .model_min = 0x90, .model_max = 0x91, .generation = CPU_AMD_ZEN2 },
+ { .family = 0x17, .model_min = 0xa0, .model_max = 0xaf, .generation = CPU_AMD_ZEN2 },
+ { .family = 0x19, .model_min = 0x00, .model_max = 0x0f, .generation = CPU_AMD_ZEN3 },
+ { .family = 0x19, .model_min = 0x20, .model_max = 0x5f, .generation = CPU_AMD_ZEN3 },
+ { .family = 0x19, .model_min = 0x10, .model_max = 0x1f, .generation = CPU_AMD_ZEN4 },
+ { .family = 0x19, .model_min = 0x60, .model_max = 0xaf, .generation = CPU_AMD_ZEN4 },
+ { .family = 0x1a, .model_min = 0x00, .model_max = 0x2f, .generation = CPU_AMD_ZEN5 },
+ { .family = 0x1a, .model_min = 0x40, .model_max = 0x4f, .generation = CPU_AMD_ZEN5 },
+ { .family = 0x1a, .model_min = 0x60, .model_max = 0x7f, .generation = CPU_AMD_ZEN5 },
+ { .family = 0x1a, .model_min = 0x50, .model_max = 0x5f, .generation = CPU_AMD_ZEN6 },
+ { .family = 0x1a, .model_min = 0x80, .model_max = 0xaf, .generation = CPU_AMD_ZEN6 },
+ { .family = 0x1a, .model_min = 0xc0, .model_max = 0xcf, .generation = CPU_AMD_ZEN6 },
+};
+
+u_int
+ident_zen_cpu(void)
+{
+ u_int family = CPUID_TO_FAMILY(cpu_id);
+ u_int model = CPUID_TO_MODEL(cpu_id);
+ int i;
+
+ if (cpu_vendor_id != CPU_VENDOR_AMD)
+ return (CPU_AMD_UNKNOWN);
+
+ for (i = 0; i < nitems(zen_idents); i++) {
+ if (family != zen_idents[i].family)
+ continue;
+ if (model < zen_idents[i].model_min ||
+ model > zen_idents[i].model_max)
+ continue;
+ return (zen_idents[i].generation);
+ }
+
+ return (CPU_AMD_UNKNOWN);
+}

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