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Index: head/lib/clang/include/llvm/Config/AsmParsers.def
===================================================================
--- head/lib/clang/include/llvm/Config/AsmParsers.def
+++ head/lib/clang/include/llvm/Config/AsmParsers.def
@@ -4,11 +4,23 @@
# error Please define the macro LLVM_ASM_PARSER(TargetName)
#endif
+#ifdef LLVM_TARGET_ENABLE_AARCH64
LLVM_ASM_PARSER(AArch64)
+#endif
+#ifdef LLVM_TARGET_ENABLE_ARM
LLVM_ASM_PARSER(ARM)
+#endif
+#ifdef LLVM_TARGET_ENABLE_MIPS
LLVM_ASM_PARSER(Mips)
+#endif
+#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_ASM_PARSER(PowerPC)
+#endif
+#ifdef LLVM_TARGET_ENABLE_SPARC
LLVM_ASM_PARSER(Sparc)
+#endif
+#ifdef LLVM_TARGET_ENABLE_X86
LLVM_ASM_PARSER(X86)
+#endif
#undef LLVM_ASM_PARSER
Index: head/lib/clang/include/llvm/Config/AsmPrinters.def
===================================================================
--- head/lib/clang/include/llvm/Config/AsmPrinters.def
+++ head/lib/clang/include/llvm/Config/AsmPrinters.def
@@ -4,11 +4,23 @@
# error Please define the macro LLVM_ASM_PRINTER(TargetName)
#endif
+#ifdef LLVM_TARGET_ENABLE_AARCH64
LLVM_ASM_PRINTER(AArch64)
+#endif
+#ifdef LLVM_TARGET_ENABLE_ARM
LLVM_ASM_PRINTER(ARM)
+#endif
+#ifdef LLVM_TARGET_ENABLE_MIPS
LLVM_ASM_PRINTER(Mips)
+#endif
+#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_ASM_PRINTER(PowerPC)
+#endif
+#ifdef LLVM_TARGET_ENABLE_SPARC
LLVM_ASM_PRINTER(Sparc)
+#endif
+#ifdef LLVM_TARGET_ENABLE_X86
LLVM_ASM_PRINTER(X86)
+#endif
#undef LLVM_ASM_PRINTER
Index: head/lib/clang/include/llvm/Config/Disassemblers.def
===================================================================
--- head/lib/clang/include/llvm/Config/Disassemblers.def
+++ head/lib/clang/include/llvm/Config/Disassemblers.def
@@ -4,11 +4,23 @@
# error Please define the macro LLVM_DISASSEMBLER(TargetName)
#endif
+#ifdef LLVM_TARGET_ENABLE_AARCH64
LLVM_DISASSEMBLER(AArch64)
+#endif
+#ifdef LLVM_TARGET_ENABLE_ARM
LLVM_DISASSEMBLER(ARM)
+#endif
+#ifdef LLVM_TARGET_ENABLE_MIPS
LLVM_DISASSEMBLER(Mips)
+#endif
+#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_DISASSEMBLER(PowerPC)
+#endif
+#ifdef LLVM_TARGET_ENABLE_SPARC
LLVM_DISASSEMBLER(Sparc)
+#endif
+#ifdef LLVM_TARGET_ENABLE_X86
LLVM_DISASSEMBLER(X86)
+#endif
#undef LLVM_DISASSEMBLER
Index: head/lib/clang/include/llvm/Config/Targets.def
===================================================================
--- head/lib/clang/include/llvm/Config/Targets.def
+++ head/lib/clang/include/llvm/Config/Targets.def
@@ -4,11 +4,23 @@
# error Please define the macro LLVM_TARGET(TargetName)
#endif
+#ifdef LLVM_TARGET_ENABLE_AARCH64
LLVM_TARGET(AArch64)
+#endif
+#ifdef LLVM_TARGET_ENABLE_ARM
LLVM_TARGET(ARM)
+#endif
+#ifdef LLVM_TARGET_ENABLE_MIPS
LLVM_TARGET(Mips)
+#endif
+#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_TARGET(PowerPC)
+#endif
+#ifdef LLVM_TARGET_ENABLE_SPARC
LLVM_TARGET(Sparc)
+#endif
+#ifdef LLVM_TARGET_ENABLE_X86
LLVM_TARGET(X86)
+#endif
#undef LLVM_TARGET
Index: head/lib/clang/include/llvm/Config/llvm-config.h
===================================================================
--- head/lib/clang/include/llvm/Config/llvm-config.h
+++ head/lib/clang/include/llvm/Config/llvm-config.h
@@ -34,25 +34,25 @@
/* #undef LLVM_HOST_TRIPLE */
/* LLVM architecture name for the native architecture, if available */
-#define LLVM_NATIVE_ARCH X86
+/* #undef LLVM_NATIVE_ARCH */
/* LLVM name for the native AsmParser init function, if available */
-#define LLVM_NATIVE_ASMPARSER LLVMInitializeX86AsmParser
+/* #undef LLVM_NATIVE_ASMPARSER */
/* LLVM name for the native AsmPrinter init function, if available */
-#define LLVM_NATIVE_ASMPRINTER LLVMInitializeX86AsmPrinter
+/* #undef LLVM_NATIVE_ASMPRINTER */
/* LLVM name for the native Disassembler init function, if available */
-#define LLVM_NATIVE_DISASSEMBLER LLVMInitializeX86Disassembler
+/* #undef LLVM_NATIVE_DISASSEMBLER */
/* LLVM name for the native Target init function, if available */
-#define LLVM_NATIVE_TARGET LLVMInitializeX86Target
+/* #undef LLVM_NATIVE_TARGET */
/* LLVM name for the native TargetInfo init function, if available */
-#define LLVM_NATIVE_TARGETINFO LLVMInitializeX86TargetInfo
+/* #undef LLVM_NATIVE_TARGETINFO */
/* LLVM name for the native target MC init function, if available */
-#define LLVM_NATIVE_TARGETMC LLVMInitializeX86TargetMC
+/* #undef LLVM_NATIVE_TARGETMC */
/* Define if this is Unixish platform */
#define LLVM_ON_UNIX 1
Index: head/lib/clang/libllvm/Makefile
===================================================================
--- head/lib/clang/libllvm/Makefile
+++ head/lib/clang/libllvm/Makefile
@@ -7,8 +7,19 @@
INTERNALLIB=
CFLAGS+= -I${.OBJDIR}
+
+.if ${MK_LLVM_TARGET_AARCH64} == "no" && ${MK_LLVM_TARGET_ARM} == "no" && \
+ ${MK_LLVM_TARGET_MIPS} == "no" && ${MK_LLVM_TARGET_POWERPC} == "no" && \
+ ${MK_LLVM_TARGET_SPARC} == "no" && ${MK_LLVM_TARGET_X86} == "no"
+.error Please enable at least one of: MK_LLVM_TARGET_AARCH64,\
+ MK_LLVM_TARGET_ARM, MK_LLVM_TARGET_MIPS, MK_LLVM_TARGET_POWERPC,\
+ MK_LLVM_TARGET_SPARC, or MK_LLVM_TARGET_X86
+.endif
+
.for arch in AArch64 ARM Mips PowerPC Sparc X86
+. if ${MK_LLVM_TARGET_${arch:tu}} != "no"
CFLAGS+= -I${LLVM_SRCS}/lib/Target/${arch}
+. endif
.endfor
SRCDIR= lib
@@ -784,6 +795,7 @@
SRCS_MIN+= TableGen/TGLexer.cpp
SRCS_MIN+= TableGen/TGParser.cpp
SRCS_MIN+= TableGen/TableGenBackend.cpp
+.if ${MK_LLVM_TARGET_AARCH64} != "no"
SRCS_MIN+= Target/AArch64/AArch64A53Fix835769.cpp
SRCS_MIN+= Target/AArch64/AArch64A57FPLoadBalancing.cpp
SRCS_MIN+= Target/AArch64/AArch64AdvSIMDScalarPass.cpp
@@ -836,6 +848,8 @@
SRCS_MIN+= Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
SRCS_MIN+= Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
SRCS_MIN+= Target/AArch64/Utils/AArch64BaseInfo.cpp
+.endif # MK_LLVM_TARGET_AARCH64
+.if ${MK_LLVM_TARGET_ARM} != "no"
SRCS_MIN+= Target/ARM/A15SDOptimizer.cpp
SRCS_MIN+= Target/ARM/ARMAsmPrinter.cpp
SRCS_MIN+= Target/ARM/ARMBaseInstrInfo.cpp
@@ -890,6 +904,8 @@
SRCS_MIN+= Target/ARM/Thumb2SizeReduction.cpp
SRCS_MIN+= Target/ARM/ThumbRegisterInfo.cpp
SRCS_MIN+= Target/ARM/Utils/ARMBaseInfo.cpp
+.endif # MK_LLVM_TARGET_ARM
+.if ${MK_LLVM_TARGET_MIPS} != "no"
SRCS_MIN+= Target/Mips/AsmParser/MipsAsmParser.cpp
SRCS_XDW+= Target/Mips/Disassembler/MipsDisassembler.cpp
SRCS_MIN+= Target/Mips/InstPrinter/MipsInstPrinter.cpp
@@ -940,6 +956,8 @@
SRCS_MIN+= Target/Mips/MipsTargetMachine.cpp
SRCS_MIN+= Target/Mips/MipsTargetObjectFile.cpp
SRCS_MIN+= Target/Mips/TargetInfo/MipsTargetInfo.cpp
+.endif # MK_LLVM_TARGET_MIPS
+.if ${MK_LLVM_TARGET_POWERPC} != "no"
SRCS_MIN+= Target/PowerPC/AsmParser/PPCAsmParser.cpp
SRCS_MIN+= Target/PowerPC/Disassembler/PPCDisassembler.cpp
SRCS_MIN+= Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
@@ -983,6 +1001,8 @@
SRCS_MIN+= Target/PowerPC/PPCVSXFMAMutate.cpp
SRCS_MIN+= Target/PowerPC/PPCVSXSwapRemoval.cpp
SRCS_MIN+= Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
+.endif # MK_LLVM_TARGET_POWERPC
+.if ${MK_LLVM_TARGET_SPARC} != "no"
SRCS_MIN+= Target/Sparc/AsmParser/SparcAsmParser.cpp
SRCS_MIN+= Target/Sparc/DelaySlotFiller.cpp
SRCS_XDW+= Target/Sparc/Disassembler/SparcDisassembler.cpp
@@ -1007,11 +1027,13 @@
SRCS_MIN+= Target/Sparc/SparcTargetMachine.cpp
SRCS_MIN+= Target/Sparc/SparcTargetObjectFile.cpp
SRCS_MIN+= Target/Sparc/TargetInfo/SparcTargetInfo.cpp
+.endif # MK_LLVM_TARGET_SPARC
SRCS_MIN+= Target/Target.cpp
SRCS_MIN+= Target/TargetIntrinsicInfo.cpp
SRCS_MIN+= Target/TargetLoweringObjectFile.cpp
SRCS_MIN+= Target/TargetMachine.cpp
SRCS_MIN+= Target/TargetMachineC.cpp
+.if ${MK_LLVM_TARGET_X86} != "no"
SRCS_MIN+= Target/X86/AsmParser/X86AsmInstrumentation.cpp
SRCS_MIN+= Target/X86/AsmParser/X86AsmParser.cpp
SRCS_XDW+= Target/X86/Disassembler/X86Disassembler.cpp
@@ -1069,6 +1091,7 @@
SRCS_MIN+= Target/X86/X86VZeroUpper.cpp
SRCS_MIN+= Target/X86/X86WinAllocaExpander.cpp
SRCS_MIN+= Target/X86/X86WinEHState.cpp
+.endif # MK_LLVM_TARGET_X86
SRCS_EXT+= ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
SRCS_EXL+= ToolDrivers/llvm-lib/LibDriver.cpp
SRCS_MIN+= Transforms/Coroutines/CoroCleanup.cpp
@@ -1375,6 +1398,7 @@
${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
. endfor
.endfor
+.if ${MK_LLVM_TARGET_AARCH64} != "no"
TGHDRS+= AArch64GenAsmMatcher.inc
TGHDRS+= AArch64GenAsmWriter.inc
TGHDRS+= AArch64GenAsmWriter1.inc
@@ -1390,6 +1414,8 @@
TGHDRS+= AArch64GenRegisterInfo.inc
TGHDRS+= AArch64GenSubtargetInfo.inc
TGHDRS+= AArch64GenSystemOperands.inc
+.endif # MK_LLVM_TARGET_AARCH64
+.if ${MK_LLVM_TARGET_ARM} != "no"
TGHDRS+= ARMGenAsmMatcher.inc
TGHDRS+= ARMGenAsmWriter.inc
TGHDRS+= ARMGenCallingConv.inc
@@ -1404,6 +1430,8 @@
TGHDRS+= ARMGenRegisterInfo.inc
TGHDRS+= ARMGenSubtargetInfo.inc
TGHDRS+= ARMGenSystemRegister.inc
+.endif # MK_LLVM_TARGET_ARM
+.if ${MK_LLVM_TARGET_MIPS} != "no"
TGHDRS+= MipsGenAsmMatcher.inc
TGHDRS+= MipsGenAsmWriter.inc
TGHDRS+= MipsGenCallingConv.inc
@@ -1415,6 +1443,8 @@
TGHDRS+= MipsGenMCPseudoLowering.inc
TGHDRS+= MipsGenRegisterInfo.inc
TGHDRS+= MipsGenSubtargetInfo.inc
+.endif # MK_LLVM_TARGET_MIPS
+.if ${MK_LLVM_TARGET_POWERPC} != "no"
TGHDRS+= PPCGenAsmMatcher.inc
TGHDRS+= PPCGenAsmWriter.inc
TGHDRS+= PPCGenCallingConv.inc
@@ -1425,6 +1455,8 @@
TGHDRS+= PPCGenMCCodeEmitter.inc
TGHDRS+= PPCGenRegisterInfo.inc
TGHDRS+= PPCGenSubtargetInfo.inc
+.endif # MK_LLVM_TARGET_POWERPC
+.if ${MK_LLVM_TARGET_SPARC} != "no"
TGHDRS+= SparcGenAsmMatcher.inc
TGHDRS+= SparcGenAsmWriter.inc
TGHDRS+= SparcGenCallingConv.inc
@@ -1434,6 +1466,8 @@
TGHDRS+= SparcGenMCCodeEmitter.inc
TGHDRS+= SparcGenRegisterInfo.inc
TGHDRS+= SparcGenSubtargetInfo.inc
+.endif # MK_LLVM_TARGET_SPARC
+.if ${MK_LLVM_TARGET_X86} != "no"
TGHDRS+= X86GenAsmMatcher.inc
TGHDRS+= X86GenAsmWriter.inc
TGHDRS+= X86GenAsmWriter1.inc
@@ -1447,6 +1481,7 @@
TGHDRS+= X86GenRegisterBank.inc
TGHDRS+= X86GenRegisterInfo.inc
TGHDRS+= X86GenSubtargetInfo.inc
+.endif # MK_LLVM_TARGET_X86
DEPENDFILES+= ${TGHDRS:C/$/.d/}
DPSRCS+= ${TGHDRS}
Index: head/lib/clang/llvm.build.mk
===================================================================
--- head/lib/clang/llvm.build.mk
+++ head/lib/clang/llvm.build.mk
@@ -1,5 +1,7 @@
# $FreeBSD$
+.include <src.opts.mk>
+
.ifndef LLVM_SRCS
.error Please define LLVM_SRCS before including this file
.endif
@@ -39,6 +41,52 @@
CFLAGS+= -DLLVM_DEFAULT_TARGET_TRIPLE=\"${LLVM_TARGET_TRIPLE}\"
CFLAGS+= -DLLVM_HOST_TRIPLE=\"${LLVM_BUILD_TRIPLE}\"
CFLAGS+= -DDEFAULT_SYSROOT=\"${TOOLS_PREFIX}\"
+
+.if ${MK_LLVM_TARGET_AARCH64} != "no"
+CFLAGS+= -DLLVM_TARGET_ENABLE_AARCH64
+. if ${MACHINE_CPUARCH} == "aarch64"
+LLVM_NATIVE_ARCH= AArch64
+. endif
+.endif
+.if ${MK_LLVM_TARGET_ARM} != "no"
+CFLAGS+= -DLLVM_TARGET_ENABLE_ARM
+. if ${MACHINE_CPUARCH} == "arm"
+LLVM_NATIVE_ARCH= ARM
+. endif
+.endif
+.if ${MK_LLVM_TARGET_MIPS} != "no"
+CFLAGS+= -DLLVM_TARGET_ENABLE_MIPS
+. if ${MACHINE_CPUARCH} == "mips"
+LLVM_NATIVE_ARCH= Mips
+. endif
+.endif
+.if ${MK_LLVM_TARGET_POWERPC} != "no"
+CFLAGS+= -DLLVM_TARGET_ENABLE_POWERPC
+. if ${MACHINE_CPUARCH} == "powerpc"
+LLVM_NATIVE_ARCH= PowerPC
+. endif
+.endif
+.if ${MK_LLVM_TARGET_SPARC} != "no"
+CFLAGS+= -DLLVM_TARGET_ENABLE_SPARC
+. if ${MACHINE_CPUARCH} == "sparc64"
+LLVM_NATIVE_ARCH= Sparc
+. endif
+.endif
+.if ${MK_LLVM_TARGET_X86} != "no"
+CFLAGS+= -DLLVM_TARGET_ENABLE_X86
+. if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64"
+LLVM_NATIVE_ARCH= X86
+. endif
+.endif
+
+.ifdef LLVM_NATIVE_ARCH
+CFLAGS+= -DLLVM_NATIVE_ASMPARSER=LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser
+CFLAGS+= -DLLVM_NATIVE_ASMPRINTER=LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter
+CFLAGS+= -DLLVM_NATIVE_DISASSEMBLER=LLVMInitialize${LLVM_NATIVE_ARCH}Disassembler
+CFLAGS+= -DLLVM_NATIVE_TARGET=LLVMInitialize${LLVM_NATIVE_ARCH}Target
+CFLAGS+= -DLLVM_NATIVE_TARGETINFO=LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo
+CFLAGS+= -DLLVM_NATIVE_TARGETMC=LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC
+.endif
CFLAGS+= -ffunction-sections
CFLAGS+= -fdata-sections
Index: head/share/man/man5/src.conf.5
===================================================================
--- head/share/man/man5/src.conf.5
+++ head/share/man/man5/src.conf.5
@@ -1,6 +1,6 @@
.\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman.
.\" $FreeBSD$
-.Dd June 20, 2018
+.Dd June 22, 2018
.Dt SRC.CONF 5
.Os
.Sh NAME
@@ -1019,6 +1019,66 @@
.Pp
This is a default setting on
amd64/amd64, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, riscv/riscv64 and riscv/riscv64sf.
+.It Va WITHOUT_LLVM_TARGET_AARCH64
+Set to not build LLVM target support for AArch64.
+.Pp
+This is a default setting on
+riscv/riscv64, riscv/riscv64sf and sparc64/sparc64.
+.It Va WITH_LLVM_TARGET_AARCH64
+Set to build LLVM target support for AArch64.
+.Pp
+This is a default setting on
+amd64/amd64, arm/arm, arm/armeb, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, powerpc/powerpc, powerpc/powerpc64 and powerpc/powerpcspe.
+.It Va WITHOUT_LLVM_TARGET_ARM
+Set to not build LLVM target support for ARM.
+.Pp
+This is a default setting on
+riscv/riscv64, riscv/riscv64sf and sparc64/sparc64.
+.It Va WITH_LLVM_TARGET_ARM
+Set to build LLVM target support for ARM.
+.Pp
+This is a default setting on
+amd64/amd64, arm/arm, arm/armeb, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, powerpc/powerpc, powerpc/powerpc64 and powerpc/powerpcspe.
+.It Va WITHOUT_LLVM_TARGET_MIPS
+Set to not build LLVM target support for MIPS.
+.Pp
+This is a default setting on
+riscv/riscv64, riscv/riscv64sf and sparc64/sparc64.
+.It Va WITH_LLVM_TARGET_MIPS
+Set to build LLVM target support for MIPS.
+.Pp
+This is a default setting on
+amd64/amd64, arm/arm, arm/armeb, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, powerpc/powerpc, powerpc/powerpc64 and powerpc/powerpcspe.
+.It Va WITHOUT_LLVM_TARGET_POWERPC
+Set to not build LLVM target support for PowerPC.
+.Pp
+This is a default setting on
+riscv/riscv64, riscv/riscv64sf and sparc64/sparc64.
+.It Va WITH_LLVM_TARGET_POWERPC
+Set to build LLVM target support for PowerPC.
+.Pp
+This is a default setting on
+amd64/amd64, arm/arm, arm/armeb, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, powerpc/powerpc, powerpc/powerpc64 and powerpc/powerpcspe.
+.It Va WITHOUT_LLVM_TARGET_SPARC
+Set to not build LLVM target support for SPARC.
+.Pp
+This is a default setting on
+riscv/riscv64, riscv/riscv64sf and sparc64/sparc64.
+.It Va WITH_LLVM_TARGET_SPARC
+Set to build LLVM target support for SPARC.
+.Pp
+This is a default setting on
+amd64/amd64, arm/arm, arm/armeb, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, powerpc/powerpc, powerpc/powerpc64 and powerpc/powerpcspe.
+.It Va WITHOUT_LLVM_TARGET_X86
+Set to not build LLVM target support for X86.
+.Pp
+This is a default setting on
+riscv/riscv64, riscv/riscv64sf and sparc64/sparc64.
+.It Va WITH_LLVM_TARGET_X86
+Set to build LLVM target support for X86.
+.Pp
+This is a default setting on
+amd64/amd64, arm/arm, arm/armeb, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, powerpc/powerpc, powerpc/powerpc64 and powerpc/powerpcspe.
.It Va WITH_LOADER_FIREWIRE
Enable firewire support in /boot/loader and /boot/zfsloader on x86.
This option is a nop on all other platforms.
Index: head/share/mk/src.opts.mk
===================================================================
--- head/share/mk/src.opts.mk
+++ head/share/mk/src.opts.mk
@@ -237,17 +237,23 @@
${__T} == "amd64" || ${__TT} == "arm" || ${__T} == "i386")
# Clang is enabled, and will be installed as the default /usr/bin/cc.
__DEFAULT_YES_OPTIONS+=CLANG CLANG_BOOTSTRAP CLANG_FULL CLANG_IS_CC LLD
+__DEFAULT_YES_OPTIONS+=LLVM_TARGET_AARCH64 LLVM_TARGET_ARM LLVM_TARGET_MIPS
+__DEFAULT_YES_OPTIONS+=LLVM_TARGET_POWERPC LLVM_TARGET_SPARC LLVM_TARGET_X86
__DEFAULT_NO_OPTIONS+=GCC GCC_BOOTSTRAP GNUCXX GPL_DTC
.elif ${COMPILER_FEATURES:Mc++11} && ${__T:Mriscv*} == "" && ${__T} != "sparc64"
# If an external compiler that supports C++11 is used as ${CC} and Clang
# supports the target, then Clang is enabled but GCC is installed as the
# default /usr/bin/cc.
__DEFAULT_YES_OPTIONS+=CLANG CLANG_FULL GCC GCC_BOOTSTRAP GNUCXX GPL_DTC LLD
+__DEFAULT_YES_OPTIONS+=LLVM_TARGET_AARCH64 LLVM_TARGET_ARM LLVM_TARGET_MIPS
+__DEFAULT_YES_OPTIONS+=LLVM_TARGET_POWERPC LLVM_TARGET_SPARC LLVM_TARGET_X86
__DEFAULT_NO_OPTIONS+=CLANG_BOOTSTRAP CLANG_IS_CC
.else
# Everything else disables Clang, and uses GCC instead.
__DEFAULT_YES_OPTIONS+=GCC GCC_BOOTSTRAP GNUCXX GPL_DTC
__DEFAULT_NO_OPTIONS+=CLANG CLANG_BOOTSTRAP CLANG_FULL CLANG_IS_CC LLD
+__DEFAULT_NO_OPTIONS+=LLVM_TARGET_AARCH64 LLVM_TARGET_ARM LLVM_TARGET_MIPS
+__DEFAULT_NO_OPTIONS+=LLVM_TARGET_POWERPC LLVM_TARGET_SPARC LLVM_TARGET_X86
.endif
# In-tree binutils/gcc are older versions without modern architecture support.
.if ${__T} == "aarch64" || ${__T:Mriscv*} != ""
Index: head/tools/build/options/WITHOUT_LLVM_TARGET_AARCH64
===================================================================
--- head/tools/build/options/WITHOUT_LLVM_TARGET_AARCH64
+++ head/tools/build/options/WITHOUT_LLVM_TARGET_AARCH64
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to not build LLVM target support for AArch64.
Index: head/tools/build/options/WITHOUT_LLVM_TARGET_ARM
===================================================================
--- head/tools/build/options/WITHOUT_LLVM_TARGET_ARM
+++ head/tools/build/options/WITHOUT_LLVM_TARGET_ARM
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to not build LLVM target support for ARM.
Index: head/tools/build/options/WITHOUT_LLVM_TARGET_MIPS
===================================================================
--- head/tools/build/options/WITHOUT_LLVM_TARGET_MIPS
+++ head/tools/build/options/WITHOUT_LLVM_TARGET_MIPS
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to not build LLVM target support for MIPS.
Index: head/tools/build/options/WITHOUT_LLVM_TARGET_POWERPC
===================================================================
--- head/tools/build/options/WITHOUT_LLVM_TARGET_POWERPC
+++ head/tools/build/options/WITHOUT_LLVM_TARGET_POWERPC
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to not build LLVM target support for PowerPC.
Index: head/tools/build/options/WITHOUT_LLVM_TARGET_SPARC
===================================================================
--- head/tools/build/options/WITHOUT_LLVM_TARGET_SPARC
+++ head/tools/build/options/WITHOUT_LLVM_TARGET_SPARC
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to not build LLVM target support for SPARC.
Index: head/tools/build/options/WITHOUT_LLVM_TARGET_X86
===================================================================
--- head/tools/build/options/WITHOUT_LLVM_TARGET_X86
+++ head/tools/build/options/WITHOUT_LLVM_TARGET_X86
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to not build LLVM target support for X86.
Index: head/tools/build/options/WITH_LLVM_TARGET_AARCH64
===================================================================
--- head/tools/build/options/WITH_LLVM_TARGET_AARCH64
+++ head/tools/build/options/WITH_LLVM_TARGET_AARCH64
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to build LLVM target support for AArch64.
Index: head/tools/build/options/WITH_LLVM_TARGET_ARM
===================================================================
--- head/tools/build/options/WITH_LLVM_TARGET_ARM
+++ head/tools/build/options/WITH_LLVM_TARGET_ARM
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to build LLVM target support for ARM.
Index: head/tools/build/options/WITH_LLVM_TARGET_MIPS
===================================================================
--- head/tools/build/options/WITH_LLVM_TARGET_MIPS
+++ head/tools/build/options/WITH_LLVM_TARGET_MIPS
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to build LLVM target support for MIPS.
Index: head/tools/build/options/WITH_LLVM_TARGET_POWERPC
===================================================================
--- head/tools/build/options/WITH_LLVM_TARGET_POWERPC
+++ head/tools/build/options/WITH_LLVM_TARGET_POWERPC
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to build LLVM target support for PowerPC.
Index: head/tools/build/options/WITH_LLVM_TARGET_SPARC
===================================================================
--- head/tools/build/options/WITH_LLVM_TARGET_SPARC
+++ head/tools/build/options/WITH_LLVM_TARGET_SPARC
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to build LLVM target support for SPARC.
Index: head/tools/build/options/WITH_LLVM_TARGET_X86
===================================================================
--- head/tools/build/options/WITH_LLVM_TARGET_X86
+++ head/tools/build/options/WITH_LLVM_TARGET_X86
@@ -0,0 +1,2 @@
+.\" $FreeBSD$
+Set to build LLVM target support for X86.

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