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Index: sys/dts/arm/armada-385-db-ap.dts
===================================================================
--- sys/dts/arm/armada-385-db-ap.dts
+++ sys/dts/arm/armada-385-db-ap.dts
@@ -164,14 +164,6 @@
bm,pool-short = <3>;
};
- crypto@90000 {
- status = "okay";
- };
-
- crypto@92000 {
- status = "okay";
- };
-
bm@c8000 {
status = "okay";
};
Index: sys/dts/arm/armada-388-clearfog.dts
===================================================================
--- sys/dts/arm/armada-388-clearfog.dts
+++ sys/dts/arm/armada-388-clearfog.dts
@@ -318,14 +318,6 @@
status = "okay";
};
- crypto@90000 {
- status = "okay";
- };
-
- crypto@92000 {
- status = "okay";
- };
-
usb3@f0000 {
/* CON2, nearest CPU, USB2 only. */
status = "okay";
Index: sys/dts/arm/armada-388-gp.dts
===================================================================
--- sys/dts/arm/armada-388-gp.dts
+++ sys/dts/arm/armada-388-gp.dts
@@ -66,13 +66,6 @@
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
- crypto@90000 {
- status = "okay";
- };
- crypto@92000 {
- status = "okay";
- };
-
spi@10600 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
Index: sys/dts/arm/armada-38x.dtsi
===================================================================
--- sys/dts/arm/armada-38x.dtsi
+++ sys/dts/arm/armada-38x.dtsi
@@ -63,8 +63,6 @@
gpio1 = &gpio1;
serial0 = &uart0;
serial1 = &uart1;
- sram0 = &SRAM0;
- sram1 = &SRAM1;
};
pmu {
@@ -72,16 +70,6 @@
interrupts-extended = <&mpic 3>;
};
- SRAM0: sram@f1100000 {
- compatible = "mrvl,cesa-sram";
- reg = <0xf1100000 0x0010000>;
- };
-
- SRAM1: sram@f1110000 {
- compatible = "mrvl,cesa-sram";
- reg = <0xf1110000 0x0010000>;
- };
-
soc {
compatible = "marvell,armada380-mbus", "simple-bus";
#address-cells = <2>;
@@ -152,26 +140,6 @@
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
- crypto@90000 {
- compatible = "mrvl,cesa";
- reg = <0x90000 0x1000 /* tdma base reg chan 0 */
- 0x9D000 0x1000>; /* cesa base reg chan 0 */
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- sram-handle = <&SRAM0>;
- status = "disabled";
- };
-
- crypto@92000 {
- compatible = "mrvl,cesa";
- reg = <0x92000 0x1000 /* tdma base reg chan 1 */
- 0x9F000 0x1000>; /* cesa base reg chan 1 */
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- sram-handle = <&SRAM1>;
- status = "disabled";
- };
-
L2: cache-controller@8000 {
compatible = "arm,pl310-cache";
reg = <0x8000 0x1000>;
@@ -550,7 +518,22 @@
clocks = <&gateclk 4>;
};
- rtc@a3800 {
+ cesa: crypto@90000 {
+ compatible = "marvell,armada-38x-crypto";
+ reg = <0x90000 0x10000>;
+ reg-names = "regs";
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gateclk 23>, <&gateclk 21>,
+ <&gateclk 14>, <&gateclk 16>;
+ clock-names = "cesa0", "cesa1",
+ "cesaz0", "cesaz1";
+ marvell,crypto-srams = <&crypto_sram0>,
+ <&crypto_sram1>;
+ marvell,crypto-sram-size = <0x800>;
+ };
+
+ rtc: rtc@a3800 {
compatible = "marvell,armada-380-rtc";
reg = <0xa3800 0x20>, <0x184a0 0x0c>;
reg-names = "rtc", "rtc-soc";
@@ -634,6 +617,24 @@
};
};
+ crypto_sram0: sa-sram0 {
+ compatible = "mmio-sram";
+ reg = <MBUS_ID(0x09, 0x19) 0 0x800>;
+ clocks = <&gateclk 23>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 MBUS_ID(0x09, 0x19) 0 0x800>;
+ };
+
+ crypto_sram1: sa-sram1 {
+ compatible = "mmio-sram";
+ reg = <MBUS_ID(0x09, 0x15) 0 0x800>;
+ clocks = <&gateclk 21>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>;
+ };
+
bm_bppi: bm-bppi {
compatible = "mmio-sram";
reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;

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