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Index: sys/amd64/vmm/intel/ept.c
===================================================================
--- sys/amd64/vmm/intel/ept.c
+++ sys/amd64/vmm/intel/ept.c
@@ -54,13 +54,17 @@
#define AD_BITS_SUPPORTED(cap) ((cap) & (1UL << 21))
#define INVVPID_SUPPORTED(cap) ((cap) & (1UL << 32))
-#define INVVPID_ALL_TYPES_MASK 0xF0000000000UL
-#define INVVPID_ALL_TYPES_SUPPORTED(cap) \
- (((cap) & INVVPID_ALL_TYPES_MASK) == INVVPID_ALL_TYPES_MASK)
-
-#define INVEPT_ALL_TYPES_MASK 0x6000000UL
-#define INVEPT_ALL_TYPES_SUPPORTED(cap) \
- (((cap) & INVEPT_ALL_TYPES_MASK) == INVEPT_ALL_TYPES_MASK)
+#define INVVPID_REQUIRED_TYPES_MASK \
+ ((1UL << (INVVPID_TYPE_SINGLE_CONTEXT + 40)) | \
+ (1UL << (INVVPID_TYPE_ALL_CONTEXTS + 40)))
+#define INVVPID_REQUIRED_TYPES_SUPPORTED(cap) \
+ (((cap) & INVVPID_REQUIRED_TYPES_MASK) == INVVPID_REQUIRED_TYPES_MASK)
+
+#define INVEPT_REQUIRED_TYPES_MASK \
+ ((1UL << (INVEPT_TYPE_SINGLE_CONTEXT + 24)) | \
+ (1UL << (INVEPT_TYPE_ALL_CONTEXTS + 24)))
+#define INVEPT_REQUIRED_TYPES_SUPPORTED(cap) \
+ (((cap) & INVEPT_REQUIRED_TYPES_MASK) == INVEPT_REQUIRED_TYPES_MASK)
#define EPT_PWLEVELS 4 /* page walk levels */
#define EPT_ENABLE_AD_BITS (1 << 6)
@@ -86,15 +90,15 @@
* Verify that:
* - page walk length is 4 steps
* - extended page tables can be laid out in write-back memory
- * - invvpid instruction with all possible types is supported
- * - invept instruction with all possible types is supported
+ * - invvpid instruction with required types is supported
+ * - invept instruction with required types is supported
*/
if (!EPT_PWL4(cap) ||
!EPT_MEMORY_TYPE_WB(cap) ||
!INVVPID_SUPPORTED(cap) ||
- !INVVPID_ALL_TYPES_SUPPORTED(cap) ||
+ !INVVPID_REQUIRED_TYPES_SUPPORTED(cap) ||
!INVEPT_SUPPORTED(cap) ||
- !INVEPT_ALL_TYPES_SUPPORTED(cap))
+ !INVEPT_REQUIRED_TYPES_SUPPORTED(cap))
return (EINVAL);
ept_pmap_flags = ipinum & PMAP_NESTED_IPIMASK;

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