D4240.id10396.diff
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	Index: sys/dev/ahci/ahci.c
	===================================================================
	--- sys/dev/ahci/ahci.c
	+++ sys/dev/ahci/ahci.c
	@@ -483,6 +483,8 @@
	/* AHCI declares level triggered IS. */
	if (!(ctlr->quirks & AHCI_Q_EDGEIS))
	ATA_OUTL(ctlr->r_mem, AHCI_IS, is);
	+ /* Readback ensures that AHCI_IS is already updated in HW */
	+ ATA_INL(ctlr->r_mem, AHCI_IS);
	}

	/*
	@@ -501,6 +503,8 @@
	ctlr->interrupt[unit].function(arg);
	/* AHCI declares level triggered IS. */
	ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
	+ /* Readback ensures that AHCI_IS is already updated in HW */
	+ ATA_INL(ctlr->r_mem, AHCI_IS);
	}

	static void
	@@ -516,6 +520,8 @@
	ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
	if ((arg = ctlr->interrupt[unit].argument))
	ctlr->interrupt[unit].function(arg);
	+ /* Readback ensures that AHCI_IS is already updated in HW */
	+ ATA_INL(ctlr->r_mem, AHCI_IS);
	}

	struct resource *
	@@ -1606,10 +1612,15 @@
	if ((ch->quirks & AHCI_Q_NOBSYRES) == 0 &&
	(ch->quirks & AHCI_Q_ATI_PMP_BUG) == 0 &&
	softreset == 2 && et == AHCI_ERR_NONE) {
	- while ((val = fis[2]) & ATA_S_BUSY) {
	- DELAY(10);
	- if (count++ >= timeout)
	+ for ( ; count < timeout; count++) {
	+ bus_dmamap_sync(ch->dma.rfis_tag,
	+ ch->dma.rfis_map, BUS_DMASYNC_POSTREAD);
	+ val = fis[2];
	+ bus_dmamap_sync(ch->dma.rfis_tag,
	+ ch->dma.rfis_map, BUS_DMASYNC_PREREAD);
	+ if ((val & ATA_S_BUSY) == 0)
	break;
	+ DELAY(10);
	}
	}