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diff --git a/sys/arm64/arm64/mte.c b/sys/arm64/arm64/mte.c
--- a/sys/arm64/arm64/mte.c
+++ b/sys/arm64/arm64/mte.c
@@ -49,6 +49,13 @@
struct thread *mte_switch(struct thread *);
+/* Fetch the block size used by tag load and store instructions */
+static inline size_t
+mte_block_size(void)
+{
+ return (sizeof(int) << GMID_BS_SIZE(READ_SPECIALREG(GMID_EL1_REG)));
+}
+
static void
mte_update_sctlr(struct thread *td, uint64_t sctlr)
{
@@ -57,6 +64,37 @@
td->td_md.md_sctlr |= sctlr;
}
+/**
+ * Clear/sync the allocation tags for a given page. This should be done on
+ * allocation of a page to ensure a tag check fault does not occur immediately
+ * after accessing newly tagged memory.
+ */
+void
+mte_sync_tags(vm_page_t page)
+{
+ size_t block_size;
+ vm_offset_t addr;
+
+ if (!MTE_HAS_TAG_CHECK)
+ return;
+
+ /* don't clear the tags on a page that's already setup for mte */
+ if ((page->md.pv_flags & PV_MTE_TAGGED) != 0)
+ return;
+
+ block_size = mte_block_size();
+ addr = PHYS_TO_DMAP(page->phys_addr);
+
+ for (size_t count = 0; count < PAGE_SIZE;
+ count += block_size, addr += block_size)
+ asm volatile(
+ ".arch_extension memtag \n"
+ "stgm xzr, [%0] \n"
+ ".arch_extension nomemtag" : : "r" (addr));
+
+ page->md.pv_flags |= PV_MTE_TAGGED;
+}
+
void
mte_fork(struct thread *new_td, struct thread *orig_td)
{
diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c
--- a/sys/arm64/arm64/pmap.c
+++ b/sys/arm64/arm64/pmap.c
@@ -6852,6 +6852,7 @@
vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
pagezero((void *)va);
+ m->md.pv_flags &= ~PV_MTE_TAGGED;
}
/*
diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h
--- a/sys/arm64/include/cpu.h
+++ b/sys/arm64/include/cpu.h
@@ -284,6 +284,8 @@
void mte_thread_alloc(struct thread *);
void mte_thread0(struct thread *);
+void mte_sync_tags(vm_page_t page);
+
/* Functions to read the sanitised view of the special registers */
void update_special_regs(u_int);
void update_special_reg_iss(u_int, uint64_t, uint64_t);
diff --git a/sys/arm64/include/pmap.h b/sys/arm64/include/pmap.h
--- a/sys/arm64/include/pmap.h
+++ b/sys/arm64/include/pmap.h
@@ -73,6 +73,9 @@
uint8_t pv_reserve[2];
};
+/* machine page flags */
+#define PV_MTE_TAGGED 0x01 /* page is tagged with MTE */
+
enum pmap_stage {
PM_INVALID,
PM_STAGE1,

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