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diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c
--- a/sys/arm64/arm64/pmap.c
+++ b/sys/arm64/arm64/pmap.c
@@ -797,6 +797,17 @@
return (superpages_enabled != 0);
}
+bool
+pmap_vs_enabled(void)
+{
+ /*
+ * 8 and 16 are the only values hardware can support, but allow for the
+ * possibility of artificially restricting the bits, e.g. for testing.
+ */
+ KASSERT(vmids.asid_bits <= 16, ("VMID bits %d > 16", vmids.asid_bits));
+ return (vmids.asid_bits > 8);
+}
+
bool
pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l0, pd_entry_t **l1,
pd_entry_t **l2, pt_entry_t **l3)
diff --git a/sys/arm64/include/hypervisor.h b/sys/arm64/include/hypervisor.h
--- a/sys/arm64/include/hypervisor.h
+++ b/sys/arm64/include/hypervisor.h
@@ -2142,6 +2142,8 @@
#define VTCR_EL2_PS_44BIT (0x4UL << VTCR_EL2_PS_SHIFT)
#define VTCR_EL2_PS_48BIT (0x5UL << VTCR_EL2_PS_SHIFT)
#define VTCR_EL2_PS_52BIT (0x6UL << VTCR_EL2_PS_SHIFT)
+#define VTCR_EL2_VS_SHIFT 19
+#define VTCR_EL2_VS (1UL << VTCR_EL2_VS_SHIFT)
#define VTCR_EL2_DS_SHIFT 32
#define VTCR_EL2_DS (0x1UL << VTCR_EL2_DS_SHIFT)
diff --git a/sys/arm64/include/pmap.h b/sys/arm64/include/pmap.h
--- a/sys/arm64/include/pmap.h
+++ b/sys/arm64/include/pmap.h
@@ -156,6 +156,7 @@
bool pmap_page_is_mapped(vm_page_t m);
int pmap_pinit_stage(pmap_t, enum pmap_stage, int);
bool pmap_ps_enabled(pmap_t pmap);
+bool pmap_vs_enabled(void);
uint64_t pmap_to_ttbr0(pmap_t pmap);
void pmap_disable_promotion(vm_offset_t sva, vm_size_t size);
void pmap_map_delete(pmap_t, vm_offset_t, vm_offset_t);
diff --git a/sys/arm64/vmm/vmm_arm64.c b/sys/arm64/vmm/vmm_arm64.c
--- a/sys/arm64/vmm/vmm_arm64.c
+++ b/sys/arm64/vmm/vmm_arm64.c
@@ -391,6 +391,8 @@
#ifdef SMP
el2_regs.vtcr_el2 |= VTCR_EL2_SH0_IS;
#endif
+ if (pmap_vs_enabled())
+ el2_regs.vtcr_el2 |= VTCR_EL2_VS;
/*
* If FEAT_LPA2 is enabled in the host then we need to enable it here
* so the page tables created by pmap.c are correct. The meaning of

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