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Index: head/usr.sbin/bhyve/pci_emul.c
===================================================================
--- head/usr.sbin/bhyve/pci_emul.c
+++ head/usr.sbin/bhyve/pci_emul.c
@@ -586,6 +586,7 @@
{
int error;
uint64_t *baseptr, limit, addr, mask, lobits, bar;
+ uint16_t cmd, enbit;
assert(idx >= 0 && idx <= PCI_BARMAX);
@@ -604,13 +605,14 @@
switch (type) {
case PCIBAR_NONE:
baseptr = NULL;
- addr = mask = lobits = 0;
+ addr = mask = lobits = enbit = 0;
break;
case PCIBAR_IO:
baseptr = &pci_emul_iobase;
limit = PCI_EMUL_IOLIMIT;
mask = PCIM_BAR_IO_BASE;
lobits = PCIM_BAR_IO_SPACE;
+ enbit = PCIM_CMD_PORTEN;
break;
case PCIBAR_MEM64:
/*
@@ -639,12 +641,14 @@
mask = PCIM_BAR_MEM_BASE;
lobits = PCIM_BAR_MEM_SPACE | PCIM_BAR_MEM_64;
}
+ enbit = PCIM_CMD_MEMEN;
break;
case PCIBAR_MEM32:
baseptr = &pci_emul_membase32;
limit = PCI_EMUL_MEMLIMIT32;
mask = PCIM_BAR_MEM_BASE;
lobits = PCIM_BAR_MEM_SPACE | PCIM_BAR_MEM_32;
+ enbit = PCIM_CMD_MEMEN;
break;
default:
printf("pci_emul_alloc_base: invalid bar type %d\n", type);
@@ -671,6 +675,9 @@
pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);
}
+ cmd = pci_get_cfgdata16(pdi, PCIR_COMMAND);
+ if ((cmd & enbit) != enbit)
+ pci_set_cfgdata16(pdi, PCIR_COMMAND, cmd | enbit);
register_bar(pdi, idx);
return (0);
@@ -756,8 +763,7 @@
pci_set_cfgdata8(pdi, PCIR_INTLINE, 255);
pci_set_cfgdata8(pdi, PCIR_INTPIN, 0);
- pci_set_cfgdata8(pdi, PCIR_COMMAND,
- PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
+ pci_set_cfgdata8(pdi, PCIR_COMMAND, PCIM_CMD_BUSMASTEREN);
err = (*pde->pe_init)(ctx, pdi, fi->fi_param);
if (err == 0)

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