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Index: sys/dev/ioat/ioat_test.h
===================================================================
--- sys/dev/ioat/ioat_test.h
+++ sys/dev/ioat/ioat_test.h
@@ -44,6 +44,9 @@
IOAT_TEST_RAW_DMA,
IOAT_TEST_DMA_8K,
IOAT_TEST_MEMCPY,
+ IOAT_TEST_DMA_8K_PB,
+ IOAT_TEST_DMA_CRC,
+ IOAT_TEST_DMA_CRC_COPY,
IOAT_NUM_TESTKINDS
};
Index: sys/dev/ioat/ioat_test.c
===================================================================
--- sys/dev/ioat/ioat_test.c
+++ sys/dev/ioat/ioat_test.c
@@ -65,6 +65,7 @@
void *buf[IOAT_MAX_BUFS];
uint32_t length;
uint32_t depth;
+ uint32_t crc[IOAT_MAX_BUFS];
struct ioat_test *test;
TAILQ_ENTRY(test_transaction) entry;
};
@@ -312,6 +313,28 @@
desc = ioat_copy_8k_aligned(dma, dest, dst2, src, src2,
cb, tx, flags);
+ } else if (test->testkind == IOAT_TEST_DMA_8K_PB) {
+ bus_addr_t src2, dst2;
+
+ src2 = vtophys((vm_offset_t)tx->buf[2*i+1] + PAGE_SIZE);
+ dst2 = vtophys((vm_offset_t)tx->buf[2*i] + PAGE_SIZE);
+
+ desc = ioat_copy_8k_aligned(dma, dest, dst2, src, src2,
+ cb, tx, flags);
+ } else if (test->testkind == IOAT_TEST_DMA_CRC) {
+ bus_addr_t crc;
+
+ tx->crc[i] = 0;
+ crc = vtophys((vm_offset_t)&tx->crc[i]);
+ desc = ioat_crc(dma, src, tx->length,
+ NULL, crc, cb, tx, flags | DMA_CRC_STORE);
+ } else if (test->testkind == IOAT_TEST_DMA_CRC_COPY) {
+ bus_addr_t crc;
+
+ tx->crc[i] = 0;
+ crc = vtophys((vm_offset_t)&tx->crc[i]);
+ desc = ioat_copy_crc(dma, dest, src, tx->length,
+ NULL, crc, cb, tx, flags | DMA_CRC_STORE);
}
if (desc == NULL)
break;
@@ -346,7 +369,8 @@
test = arg;
memset(__DEVOLATILE(void *, test->status), 0, sizeof(test->status));
- if (test->testkind == IOAT_TEST_DMA_8K &&
+ if ((test->testkind == IOAT_TEST_DMA_8K ||
+ test->testkind == IOAT_TEST_DMA_8K_PB) &&
test->buffer_size != 2 * PAGE_SIZE) {
ioat_test_log(0, "Asked for 8k test and buffer size isn't 8k\n");
test->status[IOAT_TEST_INVALID_INPUT]++;
Index: tools/tools/ioat/ioatcontrol.8
===================================================================
--- tools/tools/ioat/ioatcontrol.8
+++ tools/tools/ioat/ioatcontrol.8
@@ -35,9 +35,12 @@
.Nm
.Op Fl c Ar period
.Op Fl E
+.Op Fl e
.Op Fl f
.Op Fl m
.Op Fl V
+.Op Fl x
+.Op Fl X
.Op Fl z
.Ar channel_number
.Ar num_txns
@@ -65,6 +68,8 @@
Configure the channel's interrupt coalescing period, in microseconds
(defaults to 0).
.It Fl E
+Test contiguous 8k copy.
+.It Fl e
Test non-contiguous 8k copy.
.It Fl f
Test block fill (by default,
@@ -74,6 +79,10 @@
Test memcpy instead of DMA.
.It Fl V
Verify copies/fills for accuracy
+.It Fl x
+Test DMA CRC.
+.It Fl X
+Test DMA copy with CRC.
.It Fl z
Zero device statistics before running test.
.El
Index: tools/tools/ioat/ioatcontrol.c
===================================================================
--- tools/tools/ioat/ioatcontrol.c
+++ tools/tools/ioat/ioatcontrol.c
@@ -54,13 +54,16 @@
printf(" %s -r [-c period] [-vVwz] channel-number address [<bufsize>]\n\n",
getprogname());
printf(" -c period - Enable interrupt coalescing (us) (default: 0)\n");
- printf(" -E - Test non-contiguous 8k copy.\n");
- printf(" -f - Test block fill (default: DMA copy).\n");
+ printf(" -E - Test contiguous 8k copy.\n");
+ printf(" -e - Test non-contiguous 8k copy.\n");
+ printf(" -f - Test block fill.\n");
printf(" -m - Test memcpy instead of DMA.\n");
printf(" -r - Issue DMA to or from a specific address.\n");
printf(" -V - Enable verification\n");
printf(" -v - <address> is a kernel virtual address\n");
printf(" -w - Write to the specified address\n");
+ printf(" -x - Test DMA CRC.\n");
+ printf(" -X - Test DMA CRC copy.\n");
printf(" -z - Zero device stats before test\n");
exit(EX_USAGE);
}
@@ -107,15 +110,15 @@
{
struct ioat_test t;
int fd, ch;
- bool fflag, rflag, Eflag, mflag;
+ bool fflag, rflag, Eflag, eflag, mflag, xflag, Xflag;
unsigned modeflags;
memset(&t, 0, sizeof(t));
- fflag = rflag = Eflag = mflag = false;
+ fflag = rflag = Eflag = eflag = mflag = xflag = Xflag = false;
modeflags = 0;
- while ((ch = getopt(argc, argv, "c:EfmrvVwz")) != -1) {
+ while ((ch = getopt(argc, argv, "c:EefmrvVwxXz")) != -1) {
switch (ch) {
case 'c':
t.coalesce_period = atoi(optarg);
@@ -124,6 +127,10 @@
Eflag = true;
modeflags++;
break;
+ case 'e':
+ eflag = true;
+ modeflags++;
+ break;
case 'f':
fflag = true;
modeflags++;
@@ -145,6 +152,12 @@
case 'w':
t.raw_write = true;
break;
+ case 'x':
+ xflag = true;
+ break;
+ case 'X':
+ Xflag = true;
+ break;
case 'z':
t.zero_stats = true;
break;
@@ -174,8 +187,15 @@
else if (Eflag) {
t.testkind = IOAT_TEST_DMA_8K;
t.buffer_size = 8 * 1024;
+ } else if (eflag) {
+ t.testkind = IOAT_TEST_DMA_8K_PB;
+ t.buffer_size = 12 * 1024;
} else if (mflag)
t.testkind = IOAT_TEST_MEMCPY;
+ else if (xflag)
+ t.testkind = IOAT_TEST_DMA_CRC;
+ else if (xflag)
+ t.testkind = IOAT_TEST_DMA_CRC_COPY;
t.channel_index = atoi(argv[0]);
if (t.channel_index > 8) {

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