D43310.id132257.diff
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D43310.id132257.diff
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	diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
	--- a/sys/arm64/arm64/identcpu.c
	+++ b/sys/arm64/arm64/identcpu.c
	@@ -1372,13 +1372,11 @@
	MRS_FIELD_VALUE_END,
	};

	-#if 0
	/* Enable when we add SVE support */
	static const struct mrs_field_hwcap id_aa64pfr0_sve_caps[] = {
	MRS_HWCAP(1, HWCAP_SVE, ID_AA64PFR0_SVE_IMPL),
	MRS_HWCAP_END
	};
	-#endif

	static const struct mrs_field_value id_aa64pfr0_ras[] = {
	MRS_FIELD_VALUE(ID_AA64PFR0_RAS_NONE, ""),
	@@ -1452,7 +1450,8 @@
	MRS_FIELD(ID_AA64PFR0, AMU, false, MRS_EXACT, id_aa64pfr0_amu),
	MRS_FIELD(ID_AA64PFR0, MPAM, false, MRS_EXACT, id_aa64pfr0_mpam),
	MRS_FIELD(ID_AA64PFR0, SEL2, false, MRS_EXACT, id_aa64pfr0_sel2),
	- MRS_FIELD(ID_AA64PFR0, SVE, false, MRS_EXACT, id_aa64pfr0_sve),
	+ MRS_FIELD_HWCAP(ID_AA64PFR0, SVE, false, MRS_LOWER, id_aa64pfr0_sve,
	+ id_aa64pfr0_sve_caps),
	MRS_FIELD(ID_AA64PFR0, RAS, false, MRS_EXACT, id_aa64pfr0_ras),
	MRS_FIELD(ID_AA64PFR0, GIC, false, MRS_EXACT, id_aa64pfr0_gic),
	MRS_FIELD_HWCAP(ID_AA64PFR0, AdvSIMD, true, MRS_LOWER,
	diff --git a/sys/arm64/arm64/trap.c b/sys/arm64/arm64/trap.c
	--- a/sys/arm64/arm64/trap.c
	+++ b/sys/arm64/arm64/trap.c
	@@ -626,6 +626,9 @@
	#endif
	break;
	case EXCP_SVE:
	+ /* Returns true if this thread can use SVE */
	+ if (sve_restore_state(td))
	+ break;
	call_trapsignal(td, SIGILL, ILL_ILLTRP, (void *)frame->tf_elr,
	exception);
	userret(td, frame);