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Index: sys/mips/mips/exception.S
===================================================================
--- sys/mips/mips/exception.S
+++ sys/mips/mips/exception.S
@@ -1110,7 +1110,7 @@
REG_S ra, CALLFRAME_RA(sp)
.mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-#if defined(__mips_n64)
+#if defined(__mips_n32) || defined(__mips_n64)
or t1, t0, MIPS_SR_COP_1_BIT | MIPS_SR_FR
#else
or t1, t0, MIPS_SR_COP_1_BIT
Index: sys/mips/mips/locore.S
===================================================================
--- sys/mips/mips/locore.S
+++ sys/mips/mips/locore.S
@@ -117,8 +117,11 @@
* Enable FPU
*/
li t1, MIPS_SR_COP_1_BIT
+#if defined(__mips_n32) || defined(__mips_n64)
+ or t1, MIPS_SR_FR
+#endif
#ifdef __mips_n64
- or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_FR
+ or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX
#endif
#endif
/*
Index: sys/mips/mips/swtch.S
===================================================================
--- sys/mips/mips/swtch.S
+++ sys/mips/mips/swtch.S
@@ -416,7 +416,7 @@
.set hardfloat
mfc0 t1, MIPS_COP_0_STATUS # Save old SR
HAZARD_DELAY
-#if defined(__mips_n64)
+#if defined(__mips_n32) || defined(__mips_n64)
or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR # enable the coprocessor
#else
or t0, t1, MIPS_SR_COP_1_BIT # enable the coprocessor
@@ -546,7 +546,7 @@
.set hardfloat
mfc0 t1, MIPS_COP_0_STATUS # Save the status register.
HAZARD_DELAY
-#if defined(__mips_n64)
+#if defined(__mips_n32) || defined(__mips_n64)
or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR
#else
or t0, t1, MIPS_SR_COP_1_BIT
@@ -585,7 +585,7 @@
PTR_L a0, TD_PCB(a0) # get pointer to pcb for thread
mfc0 t1, MIPS_COP_0_STATUS # Disable interrupts and
HAZARD_DELAY
-#if defined(__mips_n64)
+#if defined(__mips_n32) || defined(__mips_n64)
or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR # enable the coprocessor
#else
or t0, t1, MIPS_SR_COP_1_BIT # enable the coprocessor
Index: sys/mips/mips/trap.c
===================================================================
--- sys/mips/mips/trap.c
+++ sys/mips/mips/trap.c
@@ -983,7 +983,7 @@
addr = trapframe->pc;
MipsSwitchFPState(PCPU_GET(fpcurthread), td->td_frame);
PCPU_SET(fpcurthread, td);
-#if defined(__mips_n64)
+#if defined(__mips_n32) || defined(__mips_n64)
td->td_frame->sr |= MIPS_SR_COP_1_BIT | MIPS_SR_FR;
#else
td->td_frame->sr |= MIPS_SR_COP_1_BIT;

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