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diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c
--- a/sys/amd64/vmm/intel/vmx.c
+++ b/sys/amd64/vmm/intel/vmx.c
@@ -3703,15 +3703,15 @@
#define VPR_PRIO_BIT(vpr) (1 << ((vpr) >> 4))
-#define VMX_CTR_PIR(vm, vcpuid, pir_desc, notify, vector, level, msg) \
+#define VMX_CTR_PIR(vlapic, pir_desc, notify, vector, level, msg) \
do { \
- VCPU_CTR2(vm, vcpuid, msg " assert %s-triggered vector %d", \
+ VLAPIC_CTR2(vlapic, msg " assert %s-triggered vector %d", \
level ? "level" : "edge", vector); \
- VCPU_CTR1(vm, vcpuid, msg " pir0 0x%016lx", pir_desc->pir[0]); \
- VCPU_CTR1(vm, vcpuid, msg " pir1 0x%016lx", pir_desc->pir[1]); \
- VCPU_CTR1(vm, vcpuid, msg " pir2 0x%016lx", pir_desc->pir[2]); \
- VCPU_CTR1(vm, vcpuid, msg " pir3 0x%016lx", pir_desc->pir[3]); \
- VCPU_CTR1(vm, vcpuid, msg " notify: %s", notify ? "yes" : "no");\
+ VLAPIC_CTR1(vlapic, msg " pir0 0x%016lx", pir_desc->pir[0]); \
+ VLAPIC_CTR1(vlapic, msg " pir1 0x%016lx", pir_desc->pir[1]); \
+ VLAPIC_CTR1(vlapic, msg " pir2 0x%016lx", pir_desc->pir[2]); \
+ VLAPIC_CTR1(vlapic, msg " pir3 0x%016lx", pir_desc->pir[3]); \
+ VLAPIC_CTR1(vlapic, msg " notify: %s", notify ? "yes" : "no"); \
} while (0)
/*
@@ -3769,8 +3769,8 @@
}
}
- VMX_CTR_PIR(vlapic->vm, vlapic->vcpuid, pir_desc, notify, vector,
- level, "vmx_set_intr_ready");
+ VMX_CTR_PIR(vlapic, pir_desc, notify, vector, level,
+ "vmx_set_intr_ready");
return (notify);
}
@@ -3830,8 +3830,7 @@
if (ppr == 0)
return (1);
- VCPU_CTR1(vlapic->vm, vlapic->vcpuid, "HLT with non-zero PPR %d",
- lapic->ppr);
+ VLAPIC_CTR1(vlapic, "HLT with non-zero PPR %d", lapic->ppr);
vpr = 0;
for (i = 3; i >= 0; i--) {
@@ -3985,7 +3984,7 @@
vlapic_vtx = (struct vlapic_vtx *)vlapic;
pir_desc = vlapic_vtx->pir_desc;
if (atomic_cmpset_long(&pir_desc->pending, 1, 0) == 0) {
- VCPU_CTR0(vlapic->vm, vlapic->vcpuid, "vmx_inject_pir: "
+ VLAPIC_CTR0(vlapic, "vmx_inject_pir: "
"no posted interrupt pending");
return;
}
@@ -4055,7 +4054,7 @@
intr_status_new = (intr_status_old & 0xFF00) | rvi;
if (intr_status_new > intr_status_old) {
vmcs_write(VMCS_GUEST_INTR_STATUS, intr_status_new);
- VCPU_CTR2(vlapic->vm, vlapic->vcpuid, "vmx_inject_pir: "
+ VLAPIC_CTR2(vlapic, "vmx_inject_pir: "
"guest_intr_status changed from 0x%04x to 0x%04x",
intr_status_old, intr_status_new);
}
diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c
--- a/sys/amd64/vmm/io/vlapic.c
+++ b/sys/amd64/vmm/io/vlapic.c
@@ -588,8 +588,7 @@
}
isrptr[idx] &= ~(1 << bitpos);
vector = i * 32 + bitpos;
- VCPU_CTR1(vlapic->vm, vlapic->vcpuid, "EOI vector %d",
- vector);
+ VLAPIC_CTR1(vlapic, "EOI vector %d", vector);
VLAPIC_CTR_ISR(vlapic, "vlapic_process_eoi");
vlapic->isrvec_stk_top--;
vlapic_update_ppr(vlapic);
@@ -600,7 +599,7 @@
return;
}
}
- VCPU_CTR0(vlapic->vm, vlapic->vcpuid, "Gratuitous EOI");
+ VLAPIC_CTR0(vlapic, "Gratuitous EOI");
vmm_stat_incr(vlapic->vm, vlapic->vcpuid, VLAPIC_GRATUITOUS_EOI, 1);
}
@@ -915,8 +914,8 @@
struct LAPIC *lapic = vlapic->apic_page;
if (lapic->tpr != val) {
- VCPU_CTR2(vlapic->vm, vlapic->vcpuid, "vlapic TPR changed "
- "from %#x to %#x", lapic->tpr, val);
+ VLAPIC_CTR2(vlapic, "vlapic TPR changed from %#x to %#x",
+ lapic->tpr, val);
lapic->tpr = val;
vlapic_update_ppr(vlapic);
}

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