D13546.diff
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	Index: head/sys/cam/cam_ccb.h
	===================================================================
	--- head/sys/cam/cam_ccb.h
	+++ head/sys/cam/cam_ccb.h
	@@ -633,6 +633,11 @@

	struct ccb_pathinq_settings_nvme {
	uint32_t nsid; /* Namespace ID for this path */
	+ uint32_t domain;
	+ uint8_t bus;
	+ uint8_t slot;
	+ uint8_t function;
	+ uint8_t extra;
	};

	#define PATHINQ_SETTINGS_SIZE 128
	Index: head/sys/dev/nvme/nvme_sim.c
	===================================================================
	--- head/sys/dev/nvme/nvme_sim.c
	+++ head/sys/dev/nvme/nvme_sim.c
	@@ -182,7 +182,8 @@
	break;
	case XPT_PATH_INQ: /* Path routing inquiry */
	{
	- struct ccb_pathinq *cpi = &ccb->cpi;
	+ struct ccb_pathinq *cpi = &ccb->cpi;
	+ device_t dev = ctrlr->dev;

	/*
	* NVMe may have multiple LUNs on the same path. Current generation
	@@ -210,6 +211,11 @@
	cpi->protocol = PROTO_NVME;
	cpi->protocol_version = nvme_mmio_read_4(ctrlr, vs);
	cpi->xport_specific.nvme.nsid = ns->id;
	+ cpi->xport_specific.nvme.domain = pci_get_domain(dev);
	+ cpi->xport_specific.nvme.bus = pci_get_bus(dev);
	+ cpi->xport_specific.nvme.slot = pci_get_slot(dev);
	+ cpi->xport_specific.nvme.function = pci_get_function(dev);
	+ cpi->xport_specific.nvme.extra = 0;
	cpi->ccb_h.status = CAM_REQ_CMP;
	break;
	}