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Index: lib/libc/riscv/Makefile.inc
===================================================================
--- lib/libc/riscv/Makefile.inc
+++ lib/libc/riscv/Makefile.inc
@@ -3,10 +3,6 @@
# Machine dependent definitions for the RISC-V architecture.
#
-.if ${MACHINE_ARCH:Mriscv*sf} != ""
-CFLAGS+=-DSOFTFLOAT
-.endif
-
# Long double is quad precision
GDTOASRCS+=strtorQ.c
SRCS+=machdep_ldisQ.c
Index: lib/libc/riscv/gen/_setjmp.S
===================================================================
--- lib/libc/riscv/gen/_setjmp.S
+++ lib/libc/riscv/gen/_setjmp.S
@@ -61,7 +61,7 @@
sd ra, (12 * 8)(a0)
addi a0, a0, (13 * 8)
-#if !defined(_STANDALONE) && !defined(SOFTFLOAT)
+#if !defined(_STANDALONE) && defined(__riscv_float_abi_double)
/* Store the fpe registers */
fsd fs0, (0 * 16)(a0)
fsd fs1, (1 * 16)(a0)
@@ -114,7 +114,7 @@
ld ra, (12 * 8)(a0)
addi a0, a0, (13 * 8)
-#if !defined(_STANDALONE) && !defined(SOFTFLOAT)
+#if !defined(_STANDALONE) && defined(__riscv_float_abi_double)
/* Restore the fpe registers */
fld fs0, (0 * 16)(a0)
fld fs1, (1 * 16)(a0)
Index: lib/libc/riscv/gen/flt_rounds.c
===================================================================
--- lib/libc/riscv/gen/flt_rounds.c
+++ lib/libc/riscv/gen/flt_rounds.c
@@ -40,7 +40,7 @@
#include <fenv.h>
#include <float.h>
-#ifdef SOFTFLOAT
+#ifdef __riscv_float_abi_soft
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
@@ -51,7 +51,7 @@
{
uint64_t mode;
-#ifdef SOFTFLOAT
+#ifdef __riscv_float_abi_soft
mode = __softfloat_float_rounding_mode;
#else
__asm __volatile("csrr %0, fcsr" : "=r" (mode));
Index: lib/libc/riscv/gen/setjmp.S
===================================================================
--- lib/libc/riscv/gen/setjmp.S
+++ lib/libc/riscv/gen/setjmp.S
@@ -75,7 +75,7 @@
sd ra, (12 * 8)(a0)
addi a0, a0, (13 * 8)
-#ifndef SOFTFLOAT
+#ifdef __riscv_float_abi_double
/* Store the fpe registers */
fsd fs0, (0 * 16)(a0)
fsd fs1, (1 * 16)(a0)
@@ -144,7 +144,7 @@
ld ra, (12 * 8)(a0)
addi a0, a0, (13 * 8)
-#ifndef SOFTFLOAT
+#ifdef __riscv_float_abi_double
/* Restore the fpe registers */
fld fs0, (0 * 16)(a0)
fld fs1, (1 * 16)(a0)
Index: lib/msun/riscv/Makefile.inc
===================================================================
--- lib/msun/riscv/Makefile.inc
+++ lib/msun/riscv/Makefile.inc
@@ -1,8 +1,4 @@
# $FreeBSD$
-.if ${MACHINE_ARCH:Mriscv*sf} != ""
-CFLAGS+=-DSOFTFLOAT
-.endif
-
LDBL_PREC = 113
SYM_MAPS += ${.CURDIR}/riscv/Symbol.map
Index: lib/msun/riscv/fenv.h
===================================================================
--- lib/msun/riscv/fenv.h
+++ lib/msun/riscv/fenv.h
@@ -73,12 +73,20 @@
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
-#ifndef SOFTFLOAT
+#if !defined(__riscv_float_abi_soft) && !defined(__riscv_float_abi_double)
+#if defined(__riscv_float_abi_single)
+#error single precision floating point ABI not supported
+#else
+#error compiler did not set soft/hard float macros
+#endif
+#endif
+
+#ifndef __riscv_float_abi_soft
#define __rfs(__fcsr) __asm __volatile("csrr %0, fcsr" : "=r" (__fcsr))
#define __wfs(__fcsr) __asm __volatile("csrw fcsr, %0" :: "r" (__fcsr))
#endif
-#ifdef SOFTFLOAT
+#ifdef __riscv_float_abi_soft
int feclearexcept(int __excepts);
int fegetexceptflag(fexcept_t *__flagp, int __excepts);
int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
@@ -206,13 +214,13 @@
return (0);
}
-#endif /* !SOFTFLOAT */
+#endif /* !__riscv_float_abi_soft */
#if __BSD_VISIBLE
/* We currently provide no external definitions of the functions below. */
-#ifdef SOFTFLOAT
+#ifdef __riscv_float_abi_soft
int feenableexcept(int __mask);
int fedisableexcept(int __mask);
int fegetexcept(void);
@@ -243,7 +251,7 @@
return (0);
}
-#endif /* !SOFTFLOAT */
+#endif /* !__riscv_float_abi_soft */
#endif /* __BSD_VISIBLE */
Index: lib/msun/riscv/fenv.c
===================================================================
--- lib/msun/riscv/fenv.c
+++ lib/msun/riscv/fenv.c
@@ -39,7 +39,7 @@
*/
const fenv_t __fe_dfl_env = 0;
-#ifdef SOFTFLOAT
+#ifdef __riscv_float_abi_soft
#define __set_env(env, flags, mask, rnd) env = ((flags) | (rnd) << 5)
#define __env_flags(env) ((env) & FE_ALL_EXCEPT)
#define __env_mask(env) (0) /* No exception traps. */

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