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Index: lib/libc/arm/aeabi/Makefile.inc
===================================================================
--- lib/libc/arm/aeabi/Makefile.inc
+++ lib/libc/arm/aeabi/Makefile.inc
@@ -6,7 +6,9 @@
aeabi_unwind_cpp.c \
aeabi_unwind_exidx.c
.if ${MACHINE_ARCH} != "armv6hf"
-SRCS+= aeabi_double.c \
+SRCS+= aeabi_asm_double.S \
+ aeabi_asm_float.S \
+ aeabi_double.c \
aeabi_float.c
.endif
.if ${MACHINE_ARCH:Marmv6*}
Index: lib/libc/arm/aeabi/Symbol.map
===================================================================
--- lib/libc/arm/aeabi/Symbol.map
+++ lib/libc/arm/aeabi/Symbol.map
@@ -17,6 +17,10 @@
__aeabi_dcmpgt;
__aeabi_dcmpun;
+ __aeabi_cdcmpeq;
+ __aeabi_cdcmple;
+ __aeabi_cdrcmple;
+
__aeabi_d2iz;
__aeabi_d2f;
@@ -33,6 +37,10 @@
__aeabi_fcmpgt;
__aeabi_fcmpun;
+ __aeabi_cfcmpeq;
+ __aeabi_cfcmple;
+ __aeabi_cfrcmple;
+
__aeabi_f2iz;
__aeabi_f2d;
Index: lib/libc/arm/aeabi/aeabi_asm_double.S
===================================================================
--- /dev/null
+++ lib/libc/arm/aeabi/aeabi_asm_double.S
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2014 Andrew Turner
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#define PCR_Z (1 << 30)
+#define PCR_C (1 << 29)
+
+/*
+ * These functions return the result in the CPSR register.
+ *
+ * For __aeabi_cdcmple:
+ * Z C
+ * LT 0 0
+ * EQ 1 1
+ * else 0 1
+ *
+ * __aeabi_cdrcmple is the same as __aeabi_cdcmple, however the arguments
+ * have been swapped.
+ */
+ENTRY(__aeabi_cdcmple)
+ push {r4, r5, r6, r7, ip, lr}
+
+ /* Backup the input registers */
+ mov r4, r0
+ mov r5, r1
+ mov r6, r2
+ mov r7, r3
+ /* Is it less than? */
+ bl __aeabi_dcmplt
+ cmp r0, #1
+ bne 1f
+ /* Yes, clear Z and C */
+ msr cpsr_c, #(0)
+ b 99f
+
+1:
+ /* Restore the input regsters for the next function call */
+ mov r0, r4
+ mov r1, r5
+ mov r2, r6
+ mov r3, r7
+ /* Is it equal? */
+ bl __aeabi_dcmpeq
+ cmp r0, #1
+ bne 2f
+ /* Yes, set Z and C */
+ msr cpsr_c, #(PCR_Z | PCR_C)
+ b 99f
+
+2:
+ /* Not less than or equal, set C and clear Z */
+ msr cpsr_c, #(PCR_C)
+
+99:
+ pop {r4, r5, r6, r7, ip, pc}
+END(__aeabi_cdcmple)
+
+ENTRY(__aeabi_cdrcmple)
+ /* Swap the first half of the arguments */
+ mov ip, r0
+ mov r0, r2
+ mov r2, ip
+
+ /* And the second half */
+ mov ip, r1
+ mov r1, r3
+ mov r3, ip
+
+ b __aeabi_cdcmple
+END(__aeabi_cdrcmple)
+
+/*
+ * This is just like __aeabi_cdcmple except it will not throw a vfp exception.
+ * Because of this requirement we must call __aeabi_dcmplt_soft as
+ * __aeabi_dcmplt may raise an exception. __aeabi_dcmpeq is defined to not
+ * so is safe.
+ */
+ENTRY(__aeabi_cdcmpeq)
+ push {r4, r5, r6, r7, ip, lr}
+
+ /* Backup the input registers */
+ mov r4, r0
+ mov r5, r1
+ mov r6, r2
+ mov r7, r3
+ /* Is it less than? */
+ bl __aeabi_dcmplt_soft
+ cmp r0, #1
+ bne 1f
+ /* Yes, clear Z and C */
+ msr cpsr_c, #(0)
+ b 99f
+
+1:
+ /* Restore the input regsters for the next function call */
+ mov r0, r4
+ mov r1, r5
+ mov r2, r6
+ mov r3, r7
+ /* Is it equal? */
+ bl __aeabi_dcmpeq
+ cmp r0, #1
+ bne 2f
+ /* Yes, set Z and C */
+ msr cpsr_c, #(PCR_Z | PCR_C)
+ b 99f
+
+2:
+ /* Not less than or equal, set C and clear Z */
+ msr cpsr_c, #(PCR_C)
+
+99:
+ pop {r4, r5, r6, r7, ip, pc}
+END(__aeabi_cdcmpeq)
Index: lib/libc/arm/aeabi/aeabi_asm_float.S
===================================================================
--- /dev/null
+++ lib/libc/arm/aeabi/aeabi_asm_float.S
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2014 Andrew Turner
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#define PCR_Z (1 << 30)
+#define PCR_C (1 << 29)
+
+/*
+ * These functions return the result in the CPSR register.
+ *
+ * For __aeabi_cfcmple:
+ * Z C
+ * LT 0 0
+ * EQ 1 1
+ * else 0 1
+ *
+ * __aeabi_cfrcmple is the same as __aeabi_cfcmple, however the arguments
+ * have been swapped.
+ */
+ENTRY(__aeabi_cfcmple)
+ push {r4, r5, ip, lr}
+
+ /* Backup the input registers */
+ mov r4, r0
+ mov r5, r1
+ /* Is it less than? */
+ bl __aeabi_fcmplt
+ cmp r0, #1
+ bne 1f
+ /* Yes, clear Z and C */
+ msr cpsr_c, #(0)
+ b 99f
+
+1:
+ /* Restore the input regsters for the next function call */
+ mov r0, r4
+ mov r1, r5
+ /* Is it equal? */
+ bl __aeabi_fcmpeq
+ cmp r0, #1
+ bne 2f
+ /* Yes, set Z and C */
+ msr cpsr_c, #(PCR_Z | PCR_C)
+ b 99f
+
+2:
+ /* Not less than or equal, set C and clear Z */
+ msr cpsr_c, #(PCR_C)
+
+99:
+ pop {r4, r5, ip, pc}
+END(__aeabi_cfcmple)
+
+ENTRY(__aeabi_cfrcmple)
+ /* Swap the arguments */
+ mov ip, r0
+ mov r0, r1
+ mov r1, ip
+
+ b __aeabi_cfcmple
+END(__aeabi_cfrcmple)
+
+/*
+ * This is just like __aeabi_cfcmple except it will not throw a vfp exception.
+ * Because of this requirement we must call __aeabi_fcmplt_soft as
+ * __aeabi_fcmplt may raise an exception. __aeabi_fcmpeq is defined to not
+ * so is safe.
+ */
+ENTRY(__aeabi_cfcmpeq)
+ push {r4, r5, ip, lr}
+
+ /* Backup the input registers */
+ mov r4, r0
+ mov r5, r1
+ /* Is it less than? */
+ bl __aeabi_fcmplt_soft
+ cmp r0, #1
+ bne 1f
+ /* Yes, clear Z and C */
+ msr cpsr_c, #(0)
+ b 99f
+
+1:
+ /* Restore the input regsters for the next function call */
+ mov r0, r4
+ mov r1, r5
+ /* Is it equal? */
+ bl __aeabi_fcmpeq
+ cmp r0, #1
+ bne 2f
+ /* Yes, set Z and C */
+ msr cpsr_c, #(PCR_Z | PCR_C)
+ b 99f
+
+2:
+ /* Not less than or equal, set C and clear Z */
+ msr cpsr_c, #(PCR_C)
+
+99:
+ pop {r4, r5, ip, pc}
+END(__aeabi_cfcmpeq)
Index: lib/libc/arm/aeabi/aeabi_vfp_double.S
===================================================================
--- lib/libc/arm/aeabi/aeabi_vfp_double.S
+++ lib/libc/arm/aeabi/aeabi_vfp_double.S
@@ -33,6 +33,33 @@
.fpu vfp
.syntax unified
+/* void __aeabi_cdcmpeq(double, double) */
+AEABI_ENTRY(cdcmpeq)
+ LOAD_DREG(d0, r0, r1)
+ LOAD_DREG(d1, r2, r3)
+ vcmp.f64 d0, d1
+ vmrs APSR_nzcv, fpscr
+ RET
+AEABI_END(cdcmpeq)
+
+/* void __aeabi_cdcmple(double, double) */
+AEABI_ENTRY(cdcmple)
+ LOAD_DREG(d0, r0, r1)
+ LOAD_DREG(d1, r2, r3)
+ vcmpe.f64 d0, d1
+ vmrs APSR_nzcv, fpscr
+ RET
+AEABI_END(cdcmple)
+
+/* void __aeabi_cdrcmple(double, double) */
+AEABI_ENTRY(cdrcmple)
+ LOAD_DREG(d0, r0, r1)
+ LOAD_DREG(d1, r2, r3)
+ vcmpe.f64 d1, d0
+ vmrs APSR_nzcv, fpscr
+ RET
+AEABI_END(cdrcmple)
+
/* int __aeabi_dcmpeq(double, double) */
AEABI_ENTRY(dcmpeq)
LOAD_DREG(d0, r0, r1)
Index: lib/libc/arm/aeabi/aeabi_vfp_float.S
===================================================================
--- lib/libc/arm/aeabi/aeabi_vfp_float.S
+++ lib/libc/arm/aeabi/aeabi_vfp_float.S
@@ -33,6 +33,30 @@
.fpu vfp
.syntax unified
+/* void __aeabi_cfcmpeq(float, float) */
+AEABI_ENTRY(cfcmpeq)
+ LOAD_SREGS(s0, s1, r0, r1)
+ vcmp.f32 s0, s1
+ vmrs APSR_nzcv, fpscr
+ RET
+AEABI_END(cfcmpeq)
+
+/* void __aeabi_cfcmple(float, float) */
+AEABI_ENTRY(cfcmple)
+ LOAD_SREGS(s0, s1, r0, r1)
+ vcmpe.f32 s0, s1
+ vmrs APSR_nzcv, fpscr
+ RET
+AEABI_END(cfcmple)
+
+/* void __aeabi_cfrcmple(float, float) */
+AEABI_ENTRY(cfrcmple)
+ LOAD_SREGS(s0, s1, r0, r1)
+ vcmpe.f32 s1, s0
+ vmrs APSR_nzcv, fpscr
+ RET
+AEABI_END(cfrcmple)
+
/* int __aeabi_fcmpeq(float, float) */
AEABI_ENTRY(fcmpeq)
LOAD_SREGS(s0, s1, r0, r1)

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