Page MenuHomeFreeBSD
Files F142186837

D25547.id74011.diff
No OneTemporary
Actions

D25547.id74011.diff
View Options

Index: sys/powerpc/aim/aim_machdep.c
===================================================================
--- sys/powerpc/aim/aim_machdep.c
+++ sys/powerpc/aim/aim_machdep.c
@@ -390,6 +390,25 @@
bcopy(&restorebridge, (void *)EXC_MCHK, trap_offset);
bcopy(&restorebridge, (void *)EXC_TRC, trap_offset);
bcopy(&restorebridge, (void *)EXC_BPT, trap_offset);
+ } else {
+
+ /*
+ * Use an IBAT and a DBAT to map the bottom 256M segment.
+ *
+ * It is very important to do it *now* to avoid taking a
+ * fault in .text / .data before the MMU is bootstrapped,
+ * because until then, the translation data has not been
+ * copied over from OpenFirmware, so our DSI/ISI will fail
+ * to find a match.
+ */
+
+ battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW);
+ battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs);
+
+ __asm (".balign 32; \n"
+ "mtibatu 0,%0; mtibatl 0,%1; isync; \n"
+ "mtdbatu 0,%0; mtdbatl 0,%1; isync"
+ :: "r"(battable[0].batu), "r"(battable[0].batl));
}
#else
trapsize = (size_t)&hypertrapcodeend - (size_t)&hypertrapcode;
Index: sys/powerpc/aim/mmu_oea.c
===================================================================
--- sys/powerpc/aim/mmu_oea.c
+++ sys/powerpc/aim/mmu_oea.c
@@ -420,6 +420,32 @@
return pte_lo;
}
+/*
+ * Translate OFW translations into VM attributes.
+ */
+static __inline vm_memattr_t
+moea_bootstrap_convert_wimg(uint32_t mode)
+{
+
+ switch (mode) {
+ case (PTE_I | PTE_G):
+ /* PCI device memory */
+ return VM_MEMATTR_UNCACHEABLE;
+ case (PTE_M):
+ /* Explicitly coherent */
+ return VM_MEMATTR_CACHEABLE;
+ case 0: /* Default claim */
+ case 2: /* Alternate PP bits set by OF for the original payload */
+ /* "Normal" memory. */
+ return VM_MEMATTR_DEFAULT;
+
+ default:
+ /* Err on the side of caution for unknowns */
+ /* XXX should we panic instead? */
+ return VM_MEMATTR_UNCACHEABLE;
+ }
+}
+
static void
tlbie(vm_offset_t va)
{
@@ -670,14 +696,7 @@
vm_size_t size, physsz, hwphyssz;
vm_offset_t pa, va, off;
void *dpcpu;
- register_t msr;
- /*
- * Set up BAT0 to map the lowest 256 MB area
- */
- battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW);
- battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs);
-
/*
* Map PCI memory space.
*/
@@ -693,25 +712,8 @@
battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW);
battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs);
- /*
- * Map obio devices.
- */
- battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW);
- battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs);
+ powerpc_sync();
- /*
- * Use an IBAT and a DBAT to map the bottom segment of memory
- * where we are. Turn off instruction relocation temporarily
- * to prevent faults while reprogramming the IBAT.
- */
- msr = mfmsr();
- mtmsr(msr & ~PSL_IR);
- __asm (".balign 32; \n"
- "mtibatu 0,%0; mtibatl 0,%1; isync; \n"
- "mtdbatu 0,%0; mtdbatl 0,%1; isync"
- :: "r"(battable[0].batu), "r"(battable[0].batl));
- mtmsr(msr);
-
/* map pci space */
__asm __volatile("mtdbatu 1,%0" :: "r"(battable[8].batu));
__asm __volatile("mtdbatl 1,%0" :: "r"(battable[8].batl));
@@ -910,15 +912,21 @@
/*
* If the mapping is 1:1, let the RAM and device
* on-demand BAT tables take care of the translation.
+ *
+ * However, always enter mappings for segment 16,
+ * which is mixed-protection and therefore not
+ * compatible with a BAT entry.
*/
- if (translations[i].om_va == translations[i].om_pa)
- continue;
+ if ((translations[i].om_va >> ADDR_SR_SHFT) != 0xf &&
+ translations[i].om_va == translations[i].om_pa)
+ continue;
/* Enter the pages */
for (off = 0; off < translations[i].om_len;
off += PAGE_SIZE)
- moea_kenter(translations[i].om_va + off,
- translations[i].om_pa + off);
+ moea_kenter_attr(translations[i].om_va + off,
+ translations[i].om_pa + off,
+ moea_bootstrap_convert_wimg(translations[i].om_mode));
}
}

File Metadata

Mime Type
text/plain
Expires
Sat, Jan 17, 11:50 PM (10 h, 26 m)
Storage Engine
blob
Storage Format
Raw Data
Storage Handle
27701169
Default Alt Text
D25547.id74011.diff (3 KB)

Event Timeline