Page MenuHomeFreeBSD
Files F139451423

D5077.id12944.diff
No OneTemporary
Actions

D5077.id12944.diff
View Options

Index: head/sys/conf/options.mips
===================================================================
--- head/sys/conf/options.mips
+++ head/sys/conf/options.mips
@@ -29,9 +29,13 @@
# $FreeBSD$
CPU_MIPS4KC opt_global.h
-CPU_MIPS24KC opt_global.h
-CPU_MIPS74KC opt_global.h
-CPU_MIPS1004KC opt_global.h
+CPU_MIPS24K opt_global.h
+CPU_MIPS34K opt_global.h
+CPU_MIPS74K opt_global.h
+CPU_MIPS1004K opt_global.h
+CPU_MIPS1074K opt_global.h
+CPU_INTERAPTIV opt_global.h
+CPU_PROAPTIV opt_global.h
CPU_MIPS32 opt_global.h
CPU_MIPS64 opt_global.h
CPU_SENTRY5 opt_global.h
Index: head/sys/mips/conf/AR934X_BASE
===================================================================
--- head/sys/mips/conf/AR934X_BASE
+++ head/sys/mips/conf/AR934X_BASE
@@ -12,7 +12,7 @@
machine mips mips
ident AR934X_BASE
-cpu CPU_MIPS74KC
+cpu CPU_MIPS74K
makeoptions KERNLOADADDR=0x80050000
options HZ=1000
Index: head/sys/mips/conf/QCA955X_BASE
===================================================================
--- head/sys/mips/conf/QCA955X_BASE
+++ head/sys/mips/conf/QCA955X_BASE
@@ -13,7 +13,7 @@
machine mips mips
ident QCA955X_BASE
-cpu CPU_MIPS74KC
+cpu CPU_MIPS74K
makeoptions KERNLOADADDR=0x80050000
options HZ=1000
Index: head/sys/mips/include/asm.h
===================================================================
--- head/sys/mips/include/asm.h
+++ head/sys/mips/include/asm.h
@@ -700,7 +700,7 @@
#elif defined(CPU_RMI)
#define HAZARD_DELAY
#define ITLBNOPFIX
-#elif defined(CPU_MIPS74KC)
+#elif defined(CPU_MIPS74K)
#define HAZARD_DELAY sll $0,$0,3
#define ITLBNOPFIX sll $0,$0,3
#else
Index: head/sys/mips/include/cpufunc.h
===================================================================
--- head/sys/mips/include/cpufunc.h
+++ head/sys/mips/include/cpufunc.h
@@ -248,7 +248,7 @@
#if defined(CPU_NLM) || defined(BERI_LARGE_TLB)
MIPS_RW32_COP0_SEL(config6, MIPS_COP_0_CONFIG, 6);
#endif
-#if defined(CPU_NLM) || defined(CPU_MIPS1004KC)
+#if defined(CPU_NLM) || defined(CPU_MIPS1004K)
MIPS_RW32_COP0_SEL(config7, MIPS_COP_0_CONFIG, 7);
#endif
MIPS_RW32_COP0(count, MIPS_COP_0_COUNT);
Index: head/sys/mips/include/cpuregs.h
===================================================================
--- head/sys/mips/include/cpuregs.h
+++ head/sys/mips/include/cpuregs.h
@@ -149,12 +149,12 @@
#define MIPS_CCA_CC 0x05 /* Cacheable Coherent. */
#endif
-#if defined(CPU_MIPS74KC)
+#if defined(CPU_MIPS74K)
#define MIPS_CCA_UNCACHED 0x02
#define MIPS_CCA_CACHED 0x03
#endif
-#if defined(CPU_MIPS1004KC)
+#if defined(CPU_MIPS1004K)
#define MIPS_CCA_UNCACHED 0x02
#define MIPS_CCA_CACHED 0x05
#endif
@@ -214,7 +214,7 @@
#define COP0_SYNC .word 0xc0 /* ehb */
#elif defined(CPU_SB1)
#define COP0_SYNC ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop
-#elif defined(CPU_MIPS74KC) || defined(CPU_MIPS1004KC)
+#elif defined(CPU_MIPS74K) || defined(CPU_MIPS1004K)
#define COP0_SYNC .word 0xc0 /* ehb */
#else
/*

File Metadata

Mime Type
text/plain
Expires
Sat, Dec 13, 6:11 AM (9 h, 32 m)
Storage Engine
blob
Storage Format
Raw Data
Storage Handle
26923361
Default Alt Text
D5077.id12944.diff (2 KB)

Event Timeline