D32854.id98086.diff
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D32854.id98086.diff
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	Index: sys/dev/hwpmc/hwpmc_arm64.c
	===================================================================
	--- sys/dev/hwpmc/hwpmc_arm64.c
	+++ sys/dev/hwpmc/hwpmc_arm64.c
	@@ -483,6 +483,16 @@
	pc->pc_hwpmcs[i + first_ri] = phw;
	}

	+ /*
	+ * Disable all counters and overflow interrupts. Upon reset they are in
	+ * an undefined state.
	+ *
	+ * Don't issue an isb here, just wait for the one in arm64_pmcr_write()
	+ * to make the writes visible.
	+ */
	+ WRITE_SPECIALREG(pmcntenclr_el0, 0xffffffff);
	+ WRITE_SPECIALREG(pmintenclr_el1, 0xffffffff);
	+
	/* Enable unit */
	pmcr = arm64_pmcr_read();
	pmcr \|= PMCR_E;