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D37940.diff
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diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c
--- a/sys/amd64/amd64/initcpu.c
+++ b/sys/amd64/amd64/initcpu.c
@@ -247,6 +247,26 @@
return (PCPU_GET(cpuid));
}
+void
+cpu_init_small_core(void)
+{
+ u_int r[4];
+
+ if (cpu_high < 0x1a)
+ return;
+
+ cpuid_count(0x1a, 0, r);
+ if ((r[0] & CPUID_HYBRID_CORE_MASK) != CPUID_HYBRID_SMALL_CORE)
+ return;
+
+ PCPU_SET(small_core, 1);
+ if (pmap_pcid_enabled && invpcid_works &&
+ pmap_pcid_invlpg_workaround_uena) {
+ PCPU_SET(pcid_invlpg_workaround, 1);
+ pmap_pcid_invlpg_workaround = 1;
+ }
+}
+
/*
* Initialize CPU control registers
*/
@@ -255,7 +275,6 @@
{
uint64_t msr;
uint32_t cr4;
- u_int r[4];
cr4 = rcr4();
if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) {
@@ -319,18 +338,8 @@
(cpu_stdext_feature2 & CPUID_STDEXT2_RDPID) != 0)
wrmsr(MSR_TSC_AUX, cpu_auxmsr());
- if (cpu_high >= 0x1a) {
- cpuid_count(0x1a, 0, r);
- if ((r[0] & CPUID_HYBRID_CORE_MASK) ==
- CPUID_HYBRID_SMALL_CORE) {
- PCPU_SET(small_core, 1);
- if (pmap_pcid_enabled &&
- pmap_pcid_invlpg_workaround_uena) {
- PCPU_SET(pcid_invlpg_workaround, 1);
- pmap_pcid_invlpg_workaround = 1;
- }
- }
- }
+ if (!IS_BSP())
+ cpu_init_small_core();
}
void
diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c
--- a/sys/amd64/amd64/machdep.c
+++ b/sys/amd64/amd64/machdep.c
@@ -1341,6 +1341,14 @@
pmap_pcid_enabled = 0;
}
+ /*
+ * Now we can do small core initialization, after the PCID
+ * CPU features and user knobs are evaluated.
+ */
+ TUNABLE_INT_FETCH("vm.pmap.pcid_invlpg_workaround",
+ &pmap_pcid_invlpg_workaround_uena);
+ cpu_init_small_core();
+
link_elf_ireloc(kmdp);
/*
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c
--- a/sys/amd64/amd64/pmap.c
+++ b/sys/amd64/amd64/pmap.c
@@ -2566,9 +2566,6 @@
VM_PAGE_TO_PHYS(m);
}
}
-
- TUNABLE_INT_FETCH("vm.pmap.pcid_invlpg_workaround",
- &pmap_pcid_invlpg_workaround_uena);
}
SYSCTL_UINT(_vm_pmap, OID_AUTO, large_map_pml4_entries,
diff --git a/sys/amd64/include/md_var.h b/sys/amd64/include/md_var.h
--- a/sys/amd64/include/md_var.h
+++ b/sys/amd64/include/md_var.h
@@ -72,6 +72,7 @@
void amd64_syscall(struct thread *td, int traced);
void amd64_syscall_ret_flush_l1d(int error);
void amd64_syscall_ret_flush_l1d_recalc(void);
+void cpu_init_small_core(void);
void doreti_iret(void) __asm(__STRING(doreti_iret));
void doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault));
void flush_l1d_sw_abi(void);
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D37940: amd64: be more precise when enabling the AlderLake small core PCID workaround
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