D5849.id14910.diff
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	Index: sys/x86/x86/local_apic.c
	===================================================================
	--- sys/x86/x86/local_apic.c
	+++ sys/x86/x86/local_apic.c
	@@ -306,9 +306,9 @@
	static void native_lapic_ipi_raw(register_t icrlo, u_int dest);
	static void native_lapic_ipi_vectored(u_int vector, int dest);
	static int native_lapic_ipi_wait(int delay);
	+#endif /* SMP */
	static int native_lapic_ipi_alloc(inthand_t *ipifunc);
	static void native_lapic_ipi_free(int vector);
	-#endif /* SMP */

	struct apic_ops apic_ops = {
	.create = native_lapic_create,
	@@ -335,9 +335,9 @@
	.ipi_raw = native_lapic_ipi_raw,
	.ipi_vectored = native_lapic_ipi_vectored,
	.ipi_wait = native_lapic_ipi_wait,
	+#endif
	.ipi_alloc = native_lapic_ipi_alloc,
	.ipi_free = native_lapic_ipi_free,
	-#endif
	.set_lvt_mask = native_lapic_set_lvt_mask,
	.set_lvt_mode = native_lapic_set_lvt_mode,
	.set_lvt_polarity = native_lapic_set_lvt_polarity,
	@@ -1777,6 +1777,8 @@
	#endif /* DETECT_DEADLOCK */
	}

	+#endif /* SMP */
	+
	/*
	* Since the IDT is shared by all CPUs the IPI slot update needs to be globally
	* visible.
	@@ -1831,5 +1833,3 @@
	setidt(vector, &IDTVEC(rsvd), SDT_APICT, SEL_KPL, GSEL_APIC);
	mtx_unlock_spin(&icu_lock);
	}
	-
	-#endif /* SMP */