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Index: head/sys/dev/e1000/em_txrx.c
===================================================================
--- head/sys/dev/e1000/em_txrx.c
+++ head/sys/dev/e1000/em_txrx.c
@@ -457,16 +457,11 @@
prev = txr->tx_cidx_processed;
ntxd = scctx->isc_ntxd[0];
do {
+ MPASS(prev != cur);
delta = (int32_t)cur - (int32_t)prev;
- /*
- * XXX This appears to be a hack for first-packet.
- * A correct fix would prevent prev == cur in the first place.
- */
- MPASS(prev == 0 || delta != 0);
- if (prev == 0 && cur == 0)
- delta += 1;
if (delta < 0)
delta += ntxd;
+ MPASS(delta > 0);
DPRINTF(iflib_get_dev(adapter->ctx),
"%s: cidx_processed=%u cur=%u clear=%d delta=%d\n",
__FUNCTION__, prev, cur, clear, delta);
Index: head/sys/dev/e1000/if_em.c
===================================================================
--- head/sys/dev/e1000/if_em.c
+++ head/sys/dev/e1000/if_em.c
@@ -1208,6 +1208,7 @@
em_if_init(if_ctx_t ctx)
{
struct adapter *adapter = iflib_get_softc(ctx);
+ if_softc_ctx_t scctx = adapter->shared;
struct ifnet *ifp = iflib_get_ifp(ctx);
struct em_tx_queue *tx_que;
int i;
@@ -1240,7 +1241,14 @@
for (i = 0, tx_que = adapter->tx_queues; i < adapter->tx_num_queues; i++, tx_que++) {
struct tx_ring *txr = &tx_que->txr;
- txr->tx_rs_cidx = txr->tx_rs_pidx = txr->tx_cidx_processed = 0;
+ txr->tx_rs_cidx = txr->tx_rs_pidx;
+
+ /* Initialize the last processed descriptor to be the end of
+ * the ring, rather than the start, so that we avoid an
+ * off-by-one error when calculating how many descriptors are
+ * done in the credits_update function.
+ */
+ txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1;
}
/* Setup VLAN support, basic and offload if available */
Index: head/sys/dev/e1000/igb_txrx.c
===================================================================
--- head/sys/dev/e1000/igb_txrx.c
+++ head/sys/dev/e1000/igb_txrx.c
@@ -332,16 +332,11 @@
prev = txr->tx_cidx_processed;
ntxd = scctx->isc_ntxd[0];
do {
+ MPASS(prev != cur);
delta = (int32_t)cur - (int32_t)prev;
- /*
- * XXX This appears to be a hack for first-packet.
- * A correct fix would prevent prev == cur in the first place.
- */
- MPASS(prev == 0 || delta != 0);
- if (prev == 0 && cur == 0)
- delta += 1;
if (delta < 0)
delta += ntxd;
+ MPASS(delta > 0);
processed += delta;
prev = cur;
Index: head/sys/dev/ixgbe/if_ix.c
===================================================================
--- head/sys/dev/ixgbe/if_ix.c
+++ head/sys/dev/ixgbe/if_ix.c
@@ -806,7 +806,8 @@
IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
/* Cache the tail address */
- txr->tx_rs_cidx = txr->tx_rs_pidx = txr->tx_cidx_processed = 0;
+ txr->tx_rs_cidx = txr->tx_rs_pidx;
+ txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1;
for (int k = 0; k < scctx->isc_ntxd[0]; k++)
txr->tx_rsq[k] = QIDX_INVALID;
Index: head/sys/dev/ixgbe/if_ixv.c
===================================================================
--- head/sys/dev/ixgbe/if_ixv.c
+++ head/sys/dev/ixgbe/if_ixv.c
@@ -1228,7 +1228,13 @@
/* Set Tx Tail register */
txr->tail = IXGBE_VFTDT(j);
- txr->tx_rs_cidx = txr->tx_rs_pidx = txr->tx_cidx_processed = 0;
+ txr->tx_rs_cidx = txr->tx_rs_pidx;
+ /* Initialize the last processed descriptor to be the end of
+ * the ring, rather than the start, so that we avoid an
+ * off-by-one error when calculating how many descriptors are
+ * done in the credits_update function.
+ */
+ txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1;
for (int k = 0; k < scctx->isc_ntxd[0]; k++)
txr->tx_rsq[k] = QIDX_INVALID;
Index: head/sys/dev/ixgbe/ix_txrx.c
===================================================================
--- head/sys/dev/ixgbe/ix_txrx.c
+++ head/sys/dev/ixgbe/ix_txrx.c
@@ -296,11 +296,11 @@
prev = txr->tx_cidx_processed;
ntxd = scctx->isc_ntxd[0];
do {
+ MPASS(prev != cur);
delta = (int32_t)cur - (int32_t)prev;
- if (prev == 0 && cur == 0)
- delta += 1;
if (delta < 0)
delta += ntxd;
+ MPASS(delta > 0);
processed += delta;
prev = cur;
Index: head/sys/dev/ixl/ixl_txrx.c
===================================================================
--- head/sys/dev/ixl/ixl_txrx.c
+++ head/sys/dev/ixl/ixl_txrx.c
@@ -515,16 +515,11 @@
prev = txr->tx_cidx_processed;
ntxd = scctx->isc_ntxd[0];
do {
+ MPASS(prev != cur);
delta = (int32_t)cur - (int32_t)prev;
- /*
- * XXX This appears to be a hack for first-packet.
- * A correct fix would prevent prev == cur in the first place.
- */
- MPASS(prev == 0 || delta != 0);
- if (prev == 0 && cur == 0)
- delta += 1;
if (delta < 0)
delta += ntxd;
+ MPASS(delta > 0);
#if 0
device_printf(iflib_get_dev(vsi->ctx),
"%s: (q%d) cidx_processed=%u cur=%u clear=%d delta=%d\n",
@@ -793,8 +788,15 @@
for (i = 0, tx_que = vsi->tx_queues; i < vsi->num_tx_queues; i++, tx_que++) {
struct tx_ring *txr = &tx_que->txr;
- txr->tx_rs_cidx = txr->tx_rs_pidx = txr->tx_cidx_processed = 0;
+ txr->tx_rs_cidx = txr->tx_rs_pidx;
+ /* Initialize the last processed descriptor to be the end of
+ * the ring, rather than the start, so that we avoid an
+ * off-by-one error when calculating how many descriptors are
+ * done in the credits_update function.
+ */
+ txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1;
+
for (j = 0; j < scctx->isc_ntxd[0]; j++)
txr->tx_rsq[j] = QIDX_INVALID;
}
@@ -803,13 +805,14 @@
void
ixl_init_tx_cidx(struct ixl_vsi *vsi)
{
+ if_softc_ctx_t scctx = vsi->shared;
struct ixl_tx_queue *tx_que;
int i;
for (i = 0, tx_que = vsi->tx_queues; i < vsi->num_tx_queues; i++, tx_que++) {
struct tx_ring *txr = &tx_que->txr;
- txr->tx_cidx_processed = 0;
+ txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1;
}
}

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