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Index: head/sys/powerpc/aim/aim_machdep.c
===================================================================
--- head/sys/powerpc/aim/aim_machdep.c
+++ head/sys/powerpc/aim/aim_machdep.c
@@ -388,16 +388,18 @@
bcopy(&dsitrap, (void *)(EXC_DSI + trap_offset), (size_t)&dsiend -
(size_t)&dsitrap);
+ /* Set address of generictrap for self-reloc calculations */
+ *((void **)TRAP_GENTRAP) = &generictrap;
#ifdef __powerpc64__
/* Set TOC base so that the interrupt code can get at it */
- *((void **)TRAP_GENTRAP) = &generictrap;
+ *((void **)TRAP_ENTRY) = &generictrap;
*((register_t *)TRAP_TOCBASE) = toc;
#else
/* Set branch address for trap code */
if (cpu_features & PPC_FEATURE_64)
- *((void **)TRAP_GENTRAP) = &generictrap64;
+ *((void **)TRAP_ENTRY) = &generictrap64;
else
- *((void **)TRAP_GENTRAP) = &generictrap;
+ *((void **)TRAP_ENTRY) = &generictrap;
*((void **)TRAP_TOCBASE) = _GLOBAL_OFFSET_TABLE_;
/* G2-specific TLB miss helper handlers */
Index: head/sys/powerpc/aim/trap_subr32.S
===================================================================
--- head/sys/powerpc/aim/trap_subr32.S
+++ head/sys/powerpc/aim/trap_subr32.S
@@ -348,7 +348,7 @@
mtsprg1 %r1 /* save SP */
mflr %r1 /* Save the old LR in r1 */
mtsprg2 %r1 /* And then in SPRG2 */
- lwz %r1, TRAP_GENTRAP(0) /* Get branch address */
+ lwz %r1, TRAP_ENTRY(0) /* Get branch address */
mtlr %r1
li %r1, 0xe0 /* How to get the vector from LR */
blrl /* LR & (0xff00 | r1) is exception # */
@@ -908,7 +908,7 @@
mflr %r1 /* save LR */
mtsprg2 %r1 /* And then in SPRG2 */
- lwz %r1, TRAP_GENTRAP(0) /* Get branch address */
+ lwz %r1, TRAP_ENTRY(0) /* Get branch address */
mtlr %r1
li %r1, 0 /* How to get the vector from LR */
blrl /* LR & (0xff00 | r1) is exception # */
Index: head/sys/powerpc/aim/trap_subr64.S
===================================================================
--- head/sys/powerpc/aim/trap_subr64.S
+++ head/sys/powerpc/aim/trap_subr64.S
@@ -318,7 +318,7 @@
* It is software reset when 46:47 = 0b00
*/
/* 0x00 */
- ld %r2,TRAP_GENTRAP(0) /* Real-mode &generictrap */
+ ld %r2,TRAP_ENTRY(0) /* Real-mode &generictrap */
mfsrr1 %r9 /* Load SRR1 into r9 */
andis. %r9,%r9,0x3 /* Logic AND with 46:47 bits */
@@ -446,7 +446,7 @@
mtsprg1 %r1 /* save SP */
mflr %r1 /* Save the old LR in r1 */
mtsprg2 %r1 /* And then in SPRG2 */
- ld %r1,TRAP_GENTRAP(0)
+ ld %r1,TRAP_ENTRY(0)
mtlr %r1
li %r1, 0xe0 /* How to get the vector from LR */
blrl /* Branch to generictrap */
@@ -493,7 +493,7 @@
mflr %r1
/* 0x30 */
mtsprg2 %r1 /* save LR in SPRG2 */
- ld %r1,TRAP_GENTRAP(0) /* real-mode &generictrap */
+ ld %r1,TRAP_ENTRY(0) /* real-mode &generictrap */
mtlr %r1
li %r1, 0x80 /* How to get the vector from LR */
/* 0x40 */
@@ -955,7 +955,7 @@
mflr %r1 /* save LR */
mtsprg2 %r1 /* And then in SPRG2 */
- ld %r1, TRAP_GENTRAP(0) /* Get branch address */
+ ld %r1, TRAP_ENTRY(0) /* Get branch address */
mtlr %r1
li %r1, 0 /* How to get the vector from LR */
blrl /* Branch to generictrap */
Index: head/sys/powerpc/include/trap.h
===================================================================
--- head/sys/powerpc/include/trap.h
+++ head/sys/powerpc/include/trap.h
@@ -147,8 +147,9 @@
#define EXC_DTRACE 0x7ffff808
/* Magic pointer to store TOC base and other info for trap handlers on ppc64 */
-#define TRAP_GENTRAP 0x1f0
-#define TRAP_TOCBASE 0x1f8
+#define TRAP_ENTRY 0x1e8
+#define TRAP_GENTRAP 0x1f0
+#define TRAP_TOCBASE 0x1f8
#ifndef LOCORE
struct trapframe;

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