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Index: head/sys/arm/allwinner/a10_codec.c
===================================================================
--- head/sys/arm/allwinner/a10_codec.c
+++ head/sys/arm/allwinner/a10_codec.c
@@ -720,13 +720,19 @@
* Device interface
*/
+static struct ofw_compat_data compat_data[] = {
+ {"allwinner,sun4i-a10-codec", 1},
+ {"allwinner,sun7i-a20-codec", 1},
+ {NULL, 0},
+};
+
static int
a10codec_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
- if (!ofw_bus_is_compatible(dev, "allwinner,sun7i-a20-codec"))
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "Allwinner Audio Codec");
Index: head/sys/arm/allwinner/a10_ehci.c
===================================================================
--- head/sys/arm/allwinner/a10_ehci.c
+++ head/sys/arm/allwinner/a10_ehci.c
@@ -112,6 +112,7 @@
static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun4i-a10-ehci", (uintptr_t)&a10_ehci_conf },
+ { "allwinner,sun5i-a13-ehci", (uintptr_t)&a10_ehci_conf },
{ "allwinner,sun6i-a31-ehci", (uintptr_t)&a31_ehci_conf },
{ "allwinner,sun7i-a20-ehci", (uintptr_t)&a10_ehci_conf },
{ "allwinner,sun8i-a83t-ehci", (uintptr_t)&a31_ehci_conf },
Index: head/sys/arm/allwinner/a10_gpio.c
===================================================================
--- head/sys/arm/allwinner/a10_gpio.c
+++ head/sys/arm/allwinner/a10_gpio.c
@@ -80,6 +80,11 @@
extern const struct allwinner_padconf a10_padconf;
#endif
+/* Defined in a13_padconf.c */
+#ifdef SOC_ALLWINNER_A13
+extern const struct allwinner_padconf a13_padconf;
+#endif
+
/* Defined in a20_padconf.c */
#ifdef SOC_ALLWINNER_A20
extern const struct allwinner_padconf a20_padconf;
@@ -115,6 +120,9 @@
#ifdef SOC_ALLWINNER_A10
{"allwinner,sun4i-a10-pinctrl", (uintptr_t)&a10_padconf},
#endif
+#ifdef SOC_ALLWINNER_A13
+ {"allwinner,sun5i-a13-pinctrl", (uintptr_t)&a13_padconf},
+#endif
#ifdef SOC_ALLWINNER_A20
{"allwinner,sun7i-a20-pinctrl", (uintptr_t)&a20_padconf},
#endif
Index: head/sys/arm/allwinner/a13/a13_padconf.c
===================================================================
--- head/sys/arm/allwinner/a13/a13_padconf.c
+++ head/sys/arm/allwinner/a13/a13_padconf.c
@@ -0,0 +1,129 @@
+/*-
+ * Copyright (c) 2016 Emmanuel Vadot <manu@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/types.h>
+
+#include <arm/allwinner/allwinner_pinctrl.h>
+
+#ifdef SOC_ALLWINNER_A13
+
+const static struct allwinner_pins a13_pins[] = {
+ {"PB0", 1, 0, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+ {"PB1", 1, 1, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+ {"PB2", 1, 2, {"gpio_in", "gpio_out", "pwm", NULL, NULL, "eint", NULL, NULL}},
+ {"PB3", 1, 3, {"gpio_in", "gpio_out", "ir0", NULL, NULL, "eint", NULL, NULL}},
+ {"PB4", 1, 4, {"gpio_in", "gpio_out", "ir0", NULL, NULL, "eint", NULL, NULL}},
+ {"PB10", 1, 10, {"gpio_in", "gpio_out", "spi2", NULL, NULL, "eint", NULL, NULL}},
+ {"PB15", 1, 15, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+ {"PB16", 1, 16, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+ {"PB17", 1, 17, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}},
+ {"PB18", 1, 18, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}},
+
+ {"PC0", 2, 0, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC1", 2, 1, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC2", 2, 2, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC3", 2, 3, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC4", 2, 4, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+ {"PC5", 2, 5, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+ {"PC6", 2, 6, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC7", 2, 7, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC8", 2, 8, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC9", 2, 9, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC10", 2, 10, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC11", 2, 11, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC12", 2, 12, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC13", 2, 13, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC14", 2, 14, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC15", 2, 15, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC19", 2, 19, {"gpio_in", "gpio_out", "nand", NULL, "uart3", NULL, NULL, NULL}},
+
+ {"PD2", 3, 2, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD3", 3, 3, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD4", 3, 4, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD5", 3, 5, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD6", 3, 6, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD7", 3, 7, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD14", 3, 14, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD15", 3, 15, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD18", 3, 18, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD19", 3, 19, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD20", 3, 20, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD21", 3, 21, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD22", 3, 22, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD23", 3, 23, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD24", 3, 24, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD25", 3, 25, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD26", 3, 26, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+ {"PD27", 3, 27, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}},
+
+ {"PE0", 4, 0, {"gpio_in", NULL, NULL, "csi0", "spi2", NULL, "eint", NULL}},
+ {"PE1", 4, 1, {"gpio_in", NULL, NULL, "csi0", "spi2", NULL, NULL, NULL}},
+ {"PE2", 4, 2, {"gpio_in", NULL, NULL, "csi0", "spi2", NULL, NULL, NULL}},
+ {"PE3", 4, 3, {"gpio_in", "gpio_out", NULL, "csi0", "spi2", NULL, NULL, NULL}},
+ {"PE4", 4, 4, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}},
+ {"PE5", 4, 5, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}},
+ {"PE6", 4, 6, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}},
+ {"PE7", 4, 7, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}},
+ {"PE8", 4, 8, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}},
+ {"PE9", 4, 9, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}},
+ {"PE10", 4, 10, {"gpio_in", "gpio_out", NULL, "csi0", "uart1", NULL, NULL, NULL}},
+ {"PE11", 4, 11, {"gpio_in", "gpio_out", NULL, "csi0", "uart1", NULL, NULL, NULL}},
+
+ {"PF0", 5, 0, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}},
+ {"PF1", 5, 1, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}},
+ {"PF2", 5, 2, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}},
+ {"PF3", 5, 3, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}},
+ {"PF4", 5, 4, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}},
+ {"PF5", 5, 5, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}},
+
+ {"PG0", 6, 0, {"gpio_in", NULL, NULL, NULL, NULL, NULL, "eint", NULL}},
+ {"PG1", 6, 1, {"gpio_in", NULL, NULL, NULL, NULL, NULL, "eint", NULL}},
+ {"PG2", 6, 2, {"gpio_in", NULL, NULL, NULL, NULL, NULL, "eint", NULL}},
+ {"PG3", 6, 3, {"gpio_in", "gpio_out", "mmc1", NULL, "uart1", NULL, "eint", NULL}},
+ {"PG4", 6, 4, {"gpio_in", "gpio_out", "mmc1", NULL, "uart1", NULL, "eint", NULL}},
+ {"PG9", 6, 9, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+ {"PG10", 6, 10, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+ {"PG11", 6, 11, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+ {"PG12", 6, 12, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+};
+
+const struct allwinner_padconf a13_padconf = {
+ .npins = sizeof(a13_pins) / sizeof(struct allwinner_pins),
+ .pins = a13_pins,
+};
+
+#endif /* SOC_ALLWINNER_A13 */
Index: head/sys/arm/allwinner/a13/files.a13
===================================================================
--- head/sys/arm/allwinner/a13/files.a13
+++ head/sys/arm/allwinner/a13/files.a13
@@ -0,0 +1,3 @@
+# $FreeBSD$
+
+arm/allwinner/a13/a13_padconf.c standard
Index: head/sys/arm/allwinner/allwinner_machdep.c
===================================================================
--- head/sys/arm/allwinner/allwinner_machdep.c
+++ head/sys/arm/allwinner/allwinner_machdep.c
@@ -68,6 +68,14 @@
}
static int
+a13_attach(platform_t plat)
+{
+ soc_type = ALLWINNERSOC_A13;
+ soc_family = ALLWINNERSOC_SUN5I;
+ return (0);
+}
+
+static int
a20_attach(platform_t plat)
{
soc_type = ALLWINNERSOC_A20;
@@ -169,6 +177,17 @@
FDT_PLATFORM_DEF(a10, "a10", 0, "allwinner,sun4i-a10", 200);
#endif
+#if defined(SOC_ALLWINNER_A13)
+static platform_method_t a13_methods[] = {
+ PLATFORMMETHOD(platform_attach, a13_attach),
+ PLATFORMMETHOD(platform_lastaddr, allwinner_lastaddr),
+ PLATFORMMETHOD(platform_devmap_init, allwinner_devmap_init),
+
+ PLATFORMMETHOD_END,
+};
+FDT_PLATFORM_DEF(a13, "a13", 0, "allwinner,sun5i-a13", 200);
+#endif
+
#if defined(SOC_ALLWINNER_A20)
static platform_method_t a20_methods[] = {
PLATFORMMETHOD(platform_attach, a20_attach),
Index: head/sys/arm/allwinner/aw_ccu.c
===================================================================
--- head/sys/arm/allwinner/aw_ccu.c
+++ head/sys/arm/allwinner/aw_ccu.c
@@ -76,6 +76,7 @@
static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun4i-a10", CLOCK_CCU },
+ { "allwinner,sun5i-a13", CLOCK_CCU },
{ "allwinner,sun7i-a20", CLOCK_CCU },
{ "allwinner,sun6i-a31", CLOCK_CCU },
{ "allwinner,sun6i-a31s", CLOCK_CCU },
Index: head/sys/arm/allwinner/clk/aw_gate.c
===================================================================
--- head/sys/arm/allwinner/clk/aw_gate.c
+++ head/sys/arm/allwinner/clk/aw_gate.c
@@ -60,6 +60,13 @@
{ "allwinner,sun4i-a10-apb1-gates-clk",
(uintptr_t)"Allwinner APB1 Clock Gates" },
+ { "allwinner,sun5i-a13-ahb-gates-clk",
+ (uintptr_t)"Allwinner AHB Clock Gates" },
+ { "allwinner,sun5i-a13-apb0-gates-clk",
+ (uintptr_t)"Allwinner APB0 Clock Gates" },
+ { "allwinner,sun5i-a13-apb1-gates-clk",
+ (uintptr_t)"Allwinner APB1 Clock Gates" },
+
{ "allwinner,sun7i-a20-ahb-gates-clk",
(uintptr_t)"Allwinner AHB Clock Gates" },
{ "allwinner,sun7i-a20-apb0-gates-clk",
Index: head/sys/arm/allwinner/clk/aw_pll.c
===================================================================
--- head/sys/arm/allwinner/clk/aw_pll.c
+++ head/sys/arm/allwinner/clk/aw_pll.c
@@ -49,6 +49,8 @@
#include <dt-bindings/clock/sun4i-a10-pll2.h>
+#include <arm/allwinner/allwinner_machdep.h>
+
#include "clkdev_if.h"
#define AW_PLL_ENABLE (1 << 31)
@@ -101,6 +103,13 @@
#define A10_PLL2_POST_DIV (0xf << 26)
+#define A13_PLL2_POST_DIV (0xf << 26)
+#define A13_PLL2_POST_DIV_SHIFT 26
+#define A13_PLL2_FACTOR_N (0x7f << 8)
+#define A13_PLL2_FACTOR_N_SHIFT 8
+#define A13_PLL2_PRE_DIV (0x1f << 0)
+#define A13_PLL2_PRE_DIV_SHIFT 0
+
#define A23_PLL1_FACTOR_N (0x1f << 8)
#define A23_PLL1_FACTOR_N_SHIFT 8
#define A23_PLL1_FACTOR_K (0x3 << 4)
@@ -159,6 +168,7 @@
AWPLL_A10_PLL3,
AWPLL_A10_PLL5,
AWPLL_A10_PLL6,
+ AWPLL_A13_PLL2,
AWPLL_A23_PLL1,
AWPLL_A31_PLL1,
AWPLL_A31_PLL6,
@@ -462,6 +472,81 @@
}
static int
+a13_pll2_recalc(struct aw_pll_sc *sc, uint64_t *freq)
+{
+ uint32_t val, post_div, n, pre_div;
+
+ DEVICE_LOCK(sc);
+ PLL_READ(sc, &val);
+ DEVICE_UNLOCK(sc);
+
+ post_div = ((val & A13_PLL2_POST_DIV) >> A13_PLL2_POST_DIV_SHIFT) + 1;
+ if (post_div == 0)
+ post_div = 1;
+ n = (val & A13_PLL2_FACTOR_N) >> A13_PLL2_FACTOR_N_SHIFT;
+ if (n == 0)
+ n = 1;
+ pre_div = ((val & A13_PLL2_PRE_DIV) >> A13_PLL2_PRE_DIV_SHIFT) + 1;
+ if (pre_div == 0)
+ pre_div = 1;
+
+ switch (sc->id) {
+ case SUN4I_A10_PLL2_1X:
+ *freq = (*freq * 2 * n) / pre_div / post_div / 2;
+ break;
+ case SUN4I_A10_PLL2_2X:
+ *freq = (*freq * 2 * n) / pre_div / 4;
+ break;
+ case SUN4I_A10_PLL2_4X:
+ *freq = (*freq * 2 * n) / pre_div / 2;
+ break;
+ case SUN4I_A10_PLL2_8X:
+ *freq = (*freq * 2 * n) / pre_div;
+ break;
+ default:
+ return (EINVAL);
+ }
+
+ return (0);
+}
+
+static int
+a13_pll2_set_freq(struct aw_pll_sc *sc, uint64_t fin, uint64_t *fout,
+ int flags)
+{
+ uint32_t val, post_div, n, pre_div;
+
+ if (sc->id != SUN4I_A10_PLL2_1X)
+ return (ENXIO);
+
+ /*
+ * Audio Codec needs PLL2-1X to be either 24576000 or 22579200.
+ *
+ * PLL2-1X output frequency is (48MHz * n) / pre_div / post_div / 2.
+ * To get as close as possible to the desired rate, we use a
+ * pre-divider of 21 and a post-divider of 4. With these values,
+ * a multiplier of 86 or 79 gets us close to the target rates.
+ */
+ if (*fout != 24576000 && *fout != 22579200)
+ return (EINVAL);
+
+ pre_div = 21;
+ post_div = 4;
+ n = (*fout * pre_div * post_div * 2) / (2 * fin);
+
+ DEVICE_LOCK(sc);
+ PLL_READ(sc, &val);
+ val &= ~(A13_PLL2_POST_DIV | A13_PLL2_FACTOR_N | A13_PLL2_PRE_DIV);
+ val |= ((post_div - 1) << A13_PLL2_POST_DIV_SHIFT);
+ val |= (n << A13_PLL2_FACTOR_N_SHIFT);
+ val |= ((pre_div - 1) << A13_PLL2_PRE_DIV_SHIFT);
+ PLL_WRITE(sc, val);
+ DEVICE_UNLOCK(sc);
+
+ return (0);
+}
+
+static int
a23_pll1_recalc(struct aw_pll_sc *sc, uint64_t *freq)
{
uint32_t val, m, n, k, p;
@@ -591,6 +676,7 @@
PLL(AWPLL_A10_PLL3, a10_pll3_recalc, a10_pll3_set_freq, a10_pll3_init),
PLL(AWPLL_A10_PLL5, a10_pll5_recalc, NULL, NULL),
PLL(AWPLL_A10_PLL6, a10_pll6_recalc, a10_pll6_set_freq, a10_pll6_init),
+ PLL(AWPLL_A13_PLL2, a13_pll2_recalc, a13_pll2_set_freq, NULL),
PLL(AWPLL_A23_PLL1, a23_pll1_recalc, NULL, NULL),
PLL(AWPLL_A31_PLL1, a31_pll1_recalc, NULL, NULL),
PLL(AWPLL_A31_PLL6, a31_pll6_recalc, NULL, a31_pll6_init),
@@ -603,6 +689,7 @@
{ "allwinner,sun4i-a10-pll3-clk", AWPLL_A10_PLL3 },
{ "allwinner,sun4i-a10-pll5-clk", AWPLL_A10_PLL5 },
{ "allwinner,sun4i-a10-pll6-clk", AWPLL_A10_PLL6 },
+ { "allwinner,sun5i-a13-pll2-clk", AWPLL_A13_PLL2 },
{ "allwinner,sun6i-a31-pll1-clk", AWPLL_A31_PLL1 },
{ "allwinner,sun6i-a31-pll6-clk", AWPLL_A31_PLL6 },
{ "allwinner,sun8i-a23-pll1-clk", AWPLL_A23_PLL1 },
Index: head/sys/arm/allwinner/clk/aw_usbclk.c
===================================================================
--- head/sys/arm/allwinner/clk/aw_usbclk.c
+++ head/sys/arm/allwinner/clk/aw_usbclk.c
@@ -61,6 +61,7 @@
enum aw_usbclk_type {
AW_A10_USBCLK = 1,
+ AW_A13_USBCLK,
AW_A31_USBCLK,
AW_A83T_USBCLK,
AW_H3_USBCLK,
@@ -68,6 +69,7 @@
static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun4i-a10-usb-clk", AW_A10_USBCLK },
+ { "allwinner,sun5i-a13-usb-clk", AW_A13_USBCLK },
{ "allwinner,sun6i-a31-usb-clk", AW_A31_USBCLK },
{ "allwinner,sun8i-a83t-usb-clk", AW_A83T_USBCLK },
{ "allwinner,sun8i-h3-usb-clk", AW_H3_USBCLK },
Index: head/sys/arm/allwinner/std.a10
===================================================================
--- head/sys/arm/allwinner/std.a10
+++ head/sys/arm/allwinner/std.a10
@@ -10,3 +10,4 @@
files "../allwinner/files.allwinner"
files "../allwinner/files.a10"
+files "../allwinner/a13/files.a13"
Index: head/sys/arm/conf/A10
===================================================================
--- head/sys/arm/conf/A10
+++ head/sys/arm/conf/A10
@@ -26,6 +26,7 @@
options INTRNG
options SOC_ALLWINNER_A10
+options SOC_ALLWINNER_A13
options HZ=100
options SCHED_4BSD # 4BSD scheduler
@@ -83,6 +84,8 @@
device twsi
device axp209 # AXP209 Power Management Unit
+device pcf8563 # RTC
+
# GPIO
device gpio
device gpioled
@@ -114,6 +117,9 @@
# USB ethernet support, requires miibus
device miibus
+# Sound support
+device sound
+
# Pinmux
device fdt_pinctrl
Index: head/sys/conf/options.arm
===================================================================
--- head/sys/conf/options.arm
+++ head/sys/conf/options.arm
@@ -41,6 +41,7 @@
PV_STATS opt_pmap.h
QEMU_WORKAROUNDS opt_global.h
SOC_ALLWINNER_A10 opt_global.h
+SOC_ALLWINNER_A13 opt_global.h
SOC_ALLWINNER_A20 opt_global.h
SOC_ALLWINNER_A31 opt_global.h
SOC_ALLWINNER_A31S opt_global.h

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