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diff --git a/sys/dev/rtwn/rtl8812a/r12a_fw.c b/sys/dev/rtwn/rtl8812a/r12a_fw.c
--- a/sys/dev/rtwn/rtl8812a/r12a_fw.c
+++ b/sys/dev/rtwn/rtl8812a/r12a_fw.c
@@ -171,8 +171,10 @@
else
cmd.band_bw = RTWN_CMD_IQ_BAND_2GHZ;
- /* TODO: 80/160 MHz. */
- if (IEEE80211_IS_CHAN_HT40(c))
+ /* TODO: 160MHz */
+ if (IEEE80211_IS_CHAN_VHT80(c))
+ cmd.band_bw |= RTWN_CMD_IQ_CHAN_WIDTH_80;
+ else if (IEEE80211_IS_CHAN_HT40(c) || IEEE80211_IS_CHAN_VHT40(c))
cmd.band_bw |= RTWN_CMD_IQ_CHAN_WIDTH_40;
else
cmd.band_bw |= RTWN_CMD_IQ_CHAN_WIDTH_20;
diff --git a/sys/dev/rtwn/rtl8812a/r12a_reg.h b/sys/dev/rtwn/rtl8812a/r12a_reg.h
--- a/sys/dev/rtwn/rtl8812a/r12a_reg.h
+++ b/sys/dev/rtwn/rtl8812a/r12a_reg.h
@@ -75,8 +75,8 @@
#define R12A_DATA_SEC_PRIM_DOWN_20 0x02
#define R12A_DATA_SEC_PRIM_UPPER_20 0x03
#define R12A_DATA_SEC_PRIM_LOWER_20 0x04
-#define R12A_DATA_SEC_PRIM_UP_40 0x90
-#define R12A_DATA_SEC_PRIM_DOWN_40 0xa0
+#define R12A_DATA_SEC_PRIM_UP_40 0x09
+#define R12A_DATA_SEC_PRIM_DOWN_40 0x0a
/* Bits for R12A_HT_SINGLE_AMPDU. */
#define R12A_HT_SINGLE_AMPDU_PKT_ENA 0x80
diff --git a/sys/dev/rtwn/rtl8812a/r12a_tx.c b/sys/dev/rtwn/rtl8812a/r12a_tx.c
--- a/sys/dev/rtwn/rtl8812a/r12a_tx.c
+++ b/sys/dev/rtwn/rtl8812a/r12a_tx.c
@@ -147,6 +147,9 @@
case IEEE80211_MODE_11NG:
mode = IEEE80211_MODE_11G;
break;
+ case IEEE80211_MODE_VHT_5GHZ:
+ mode = IEEE80211_MODE_VHT_5GHZ;
+ break;
default:
device_printf(sc->sc_dev, "unknown mode(1) %d!\n",
ic->ic_curmode);
@@ -186,8 +189,13 @@
raid = R12A_RAID_11BGN_2;
}
break;
+ case IEEE80211_MODE_VHT_5GHZ:
+ if (sc->ntxchains == 1)
+ raid = R12A_RAID_11AC_1;
+ else
+ raid = R12A_RAID_11AC_2;
+ break;
default:
- /* TODO: 80 MHz / 11ac */
device_printf(sc->sc_dev, "unknown mode(2) %d!\n", mode);
return;
}
diff --git a/sys/dev/rtwn/rtl8812a/r12a_tx_desc.h b/sys/dev/rtwn/rtl8812a/r12a_tx_desc.h
--- a/sys/dev/rtwn/rtl8812a/r12a_tx_desc.h
+++ b/sys/dev/rtwn/rtl8812a/r12a_tx_desc.h
@@ -138,9 +138,7 @@
#define R12A_RAID_11BG 6
#define R12A_RAID_11G 7 /* "pure" 11g */
#define R12A_RAID_11B 8
-#define R12A_RAID_11AC_2_80 9
-#define R12A_RAID_11AC_1_80 10
-#define R12A_RAID_11AC_1 11
-#define R12A_RAID_11AC_2 12
+#define R12A_RAID_11AC_2 9
+#define R12A_RAID_11AC_1 10
#endif /* R12A_TX_DESC_H */

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