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strejda_gic.diff
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Authored By
skra
Apr 16 2015, 12:41 PM
2015-04-16 12:41:22 (UTC+0)
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strejda_gic.diff
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diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c
index f5a08c0..dc9754d 100644
--- a/sys/arm/arm/gic.c
+++ b/sys/arm/arm/gic.c
@@ -204,29 +204,30 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
*interrupt = fdt32_to_cpu(intr[0]);
*trig = INTR_TRIGGER_CONFORM;
*pol = INTR_POLARITY_CONFORM;
+ return (0);
+ }
+
+ if (fdt32_to_cpu(intr[0]) == 0)
+ *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI;
+ else
+ *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI;
+ /*
+ * In intr[2], bits[3:0] are trigger type and level flags.
+ * 1 = low-to-high edge triggered
+ * 2 = high-to-low edge triggered
+ * 4 = active high level-sensitive
+ * 8 = active low level-sensitive
+ * The hardware only supports active-high-level or rising-edge.
+ */
+ *pol = INTR_POLARITY_CONFORM;
+ if ((fdt32_to_cpu(intr[2]) & 0x0f) == 1) {
+ *trig = INTR_TRIGGER_EDGE;
+ } else if ((fdt32_to_cpu(intr[2]) & 0x0f) == 4) {
+ *trig = INTR_TRIGGER_LEVEL;
} else {
- if (fdt32_to_cpu(intr[0]) == 0)
- *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI;
- else
- *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI;
- /*
- * In intr[2], bits[3:0] are trigger type and level flags.
- * 1 = low-to-high edge triggered
- * 2 = high-to-low edge triggered
- * 4 = active high level-sensitive
- * 8 = active low level-sensitive
- * The hardware only supports active-high-level or rising-edge.
- */
- if (fdt32_to_cpu(intr[2]) & 0x0a) {
- printf("unsupported trigger/polarity configuration "
- "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
- return (ENOTSUP);
- }
- *pol = INTR_POLARITY_CONFORM;
- if (fdt32_to_cpu(intr[2]) & 0x01)
- *trig = INTR_TRIGGER_EDGE;
- else
- *trig = INTR_TRIGGER_LEVEL;
+ *trig = INTR_TRIGGER_CONFORM;
+ printf("ignoring unsupported trigger/polarity configuration "
+ "0x%02x\n", fdt32_to_cpu(intr[2]) & 0x0f);
}
return (0);
}
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