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Index: sys/x86/x86/intr_machdep.c
===================================================================
--- sys/x86/x86/intr_machdep.c
+++ sys/x86/x86/intr_machdep.c
@@ -46,6 +46,7 @@
#include <sys/mutex.h>
#include <sys/proc.h>
#include <sys/smp.h>
+#include <sys/sx.h>
#include <sys/syslog.h>
#include <sys/systm.h>
#include <machine/clock.h>
@@ -73,7 +74,7 @@
static int intrcnt_index;
static struct intsrc *interrupt_sources[NUM_IO_INTS];
-static struct mtx intr_table_lock;
+static struct sx intr_table_lock;
static struct mtx intrcnt_lock;
static TAILQ_HEAD(pics_head, pic) pics;
@@ -117,14 +118,14 @@
{
int error;
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
if (intr_pic_registered(pic))
error = EBUSY;
else {
TAILQ_INSERT_TAIL(&pics, pic, pics);
error = 0;
}
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
return (error);
}
@@ -148,16 +149,16 @@
vector);
if (error)
return (error);
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
if (interrupt_sources[vector] != NULL) {
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
intr_event_destroy(isrc->is_event);
return (EEXIST);
}
intrcnt_register(isrc);
interrupt_sources[vector] = isrc;
isrc->is_handlers = 0;
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
return (0);
}
@@ -181,14 +182,14 @@
error = intr_event_add_handler(isrc->is_event, name, filter, handler,
arg, intr_priority(flags), flags, cookiep);
if (error == 0) {
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
intrcnt_updatename(isrc);
isrc->is_handlers++;
if (isrc->is_handlers == 1) {
isrc->is_pic->pic_enable_intr(isrc);
isrc->is_pic->pic_enable_source(isrc);
}
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
}
return (error);
}
@@ -202,14 +203,14 @@
isrc = intr_handler_source(cookie);
error = intr_event_remove_handler(cookie);
if (error == 0) {
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
isrc->is_handlers--;
if (isrc->is_handlers == 0) {
isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
isrc->is_pic->pic_disable_intr(isrc);
}
intrcnt_updatename(isrc);
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
}
return (error);
}
@@ -283,12 +284,12 @@
#ifndef DEV_ATPIC
atpic_reset();
#endif
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
TAILQ_FOREACH(pic, &pics, pics) {
if (pic->pic_resume != NULL)
pic->pic_resume(pic, suspend_cancelled);
}
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
}
void
@@ -296,12 +297,12 @@
{
struct pic *pic;
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
TAILQ_FOREACH_REVERSE(pic, &pics, pics_head, pics) {
if (pic->pic_suspend != NULL)
pic->pic_suspend(pic);
}
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
}
static int
@@ -322,9 +323,9 @@
if (assign_cpu && cpu != NOCPU) {
#endif
isrc = arg;
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
error = isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
} else
error = 0;
return (error);
@@ -384,7 +385,7 @@
intrcnt_setname("???", 0);
intrcnt_index = 1;
TAILQ_INIT(&pics);
- mtx_init(&intr_table_lock, "intr sources", NULL, MTX_DEF);
+ sx_init(&intr_table_lock, "intr sources");
mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
}
SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
@@ -449,7 +450,7 @@
struct intsrc *is;
int v;
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
for (v = 0; v < NUM_IO_INTS; v++) {
is = interrupt_sources[v];
if (is == NULL)
@@ -457,7 +458,7 @@
if (is->is_pic->pic_reprogram_pin != NULL)
is->is_pic->pic_reprogram_pin(is);
}
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
}
#ifdef DDB
@@ -562,7 +563,7 @@
return;
/* Round-robin assign a CPU to each enabled source. */
- mtx_lock(&intr_table_lock);
+ sx_xlock(&intr_table_lock);
assign_cpu = 1;
for (i = 0; i < NUM_IO_INTS; i++) {
isrc = interrupt_sources[i];
@@ -583,7 +584,7 @@
}
}
- mtx_unlock(&intr_table_lock);
+ sx_xunlock(&intr_table_lock);
}
SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
NULL);

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