D19499.diff
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	Index: usr.sbin/bhyve/uart_emul.c
	===================================================================
	--- usr.sbin/bhyve/uart_emul.c
	+++ usr.sbin/bhyve/uart_emul.c
	@@ -4,6 +4,7 @@
	* Copyright (c) 2012 NetApp, Inc.
	* Copyright (c) 2013 Neel Natu <neel@freebsd.org>
	* All rights reserved.
	+ * Copyright (c) 2018 Joyent, Inc.
	*
	* Redistribution and use in source and binary forms, with or without
	* modification, are permitted provided that the following conditions
	@@ -431,6 +432,14 @@
	sc->thre_int_pending = true;
	break;
	case REG_IER:
	+ /*
	+ * Assert an interrupt if re-enabling the THRE intr, since we
	+ * always report THRE as active in the status register.
	+ */
	+ if ((sc->ier & IER_ETXRDY) == 0 &&
	+ (value & IER_ETXRDY) != 0) {
	+ sc->thre_int_pending = true;
	+ }
	/*
	* Apply mask so that bits 4-7 are 0
	* Also enables bits 0-3 only if they're 1