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D18194.id50793.diff
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D18194.id50793.diff
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Index: sys/dev/sfxge/common/ef10_nic.c
===================================================================
--- sys/dev/sfxge/common/ef10_nic.c
+++ sys/dev/sfxge/common/ef10_nic.c
@@ -1580,6 +1580,7 @@
uint32_t board_type = 0;
uint32_t base, nvec;
uint32_t port;
+ uint32_t mask;
uint32_t pf;
uint32_t vf;
uint8_t mac_addr[6] = { 0 };
@@ -1707,13 +1708,25 @@
encp->enc_intr_vec_base = base;
encp->enc_intr_limit = nvec;
+ /*
+ * Get the current privilege mask. Note that this may be modified
+ * dynamically, so this value is informational only. DO NOT use
+ * the privilege mask to check for sufficient privileges, as that
+ * can result in time-of-check/time-of-use bugs.
+ */
+ if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
+ goto fail10;
+ encp->enc_privilege_mask = mask;
+
/* Get remaining controller-specific board config */
if ((rc = enop->eno_board_cfg(enp)) != 0)
if (rc != EACCES)
- goto fail10;
+ goto fail11;
return (0);
+fail11:
+ EFSYS_PROBE(fail11);
fail10:
EFSYS_PROBE(fail10);
fail9:
Index: sys/dev/sfxge/common/hunt_nic.c
===================================================================
--- sys/dev/sfxge/common/hunt_nic.c
+++ sys/dev/sfxge/common/hunt_nic.c
@@ -105,7 +105,6 @@
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
efx_port_t *epp = &(enp->en_port);
- uint32_t mask;
uint32_t flags;
uint32_t sysclk, dpcpu_clk;
uint32_t bandwidth;
@@ -242,18 +241,8 @@
encp->enc_piobuf_size = HUNT_PIOBUF_SIZE;
encp->enc_piobuf_min_alloc_size = HUNT_MIN_PIO_ALLOC_SIZE;
- /*
- * Get the current privilege mask. Note that this may be modified
- * dynamically, so this value is informational only. DO NOT use
- * the privilege mask to check for sufficient privileges, as that
- * can result in time-of-check/time-of-use bugs.
- */
- if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
- goto fail5;
- encp->enc_privilege_mask = mask;
-
if ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)
- goto fail6;
+ goto fail5;
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
/* All Huntington devices have a PCIe Gen3, 8 lane connector */
@@ -261,8 +250,6 @@
return (0);
-fail6:
- EFSYS_PROBE(fail6);
fail5:
EFSYS_PROBE(fail5);
fail4:
Index: sys/dev/sfxge/common/medford2_nic.c
===================================================================
--- sys/dev/sfxge/common/medford2_nic.c
+++ sys/dev/sfxge/common/medford2_nic.c
@@ -78,7 +78,6 @@
__in efx_nic_t *enp)
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
- uint32_t mask;
uint32_t sysclk, dpcpu_clk;
uint32_t end_padding;
uint32_t bandwidth;
@@ -177,16 +176,6 @@
encp->enc_piobuf_size = MEDFORD2_PIOBUF_SIZE;
encp->enc_piobuf_min_alloc_size = MEDFORD2_MIN_PIO_ALLOC_SIZE;
- /*
- * Get the current privilege mask. Note that this may be modified
- * dynamically, so this value is informational only. DO NOT use
- * the privilege mask to check for sufficient privileges, as that
- * can result in time-of-check/time-of-use bugs.
- */
- if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
- goto fail5;
- encp->enc_privilege_mask = mask;
-
/*
* Medford2 stores a single global copy of VPD, not per-PF as on
* Huntington.
@@ -195,14 +184,12 @@
rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
if (rc != 0)
- goto fail6;
+ goto fail5;
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
return (0);
-fail6:
- EFSYS_PROBE(fail6);
fail5:
EFSYS_PROBE(fail5);
fail4:
Index: sys/dev/sfxge/common/medford_nic.c
===================================================================
--- sys/dev/sfxge/common/medford_nic.c
+++ sys/dev/sfxge/common/medford_nic.c
@@ -74,7 +74,6 @@
__in efx_nic_t *enp)
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
- uint32_t mask;
uint32_t sysclk, dpcpu_clk;
uint32_t end_padding;
uint32_t bandwidth;
@@ -174,16 +173,6 @@
encp->enc_piobuf_size = MEDFORD_PIOBUF_SIZE;
encp->enc_piobuf_min_alloc_size = MEDFORD_MIN_PIO_ALLOC_SIZE;
- /*
- * Get the current privilege mask. Note that this may be modified
- * dynamically, so this value is informational only. DO NOT use
- * the privilege mask to check for sufficient privileges, as that
- * can result in time-of-check/time-of-use bugs.
- */
- if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
- goto fail4;
- encp->enc_privilege_mask = mask;
-
/*
* Medford stores a single global copy of VPD, not per-PF as on
* Huntington.
@@ -192,14 +181,12 @@
rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth);
if (rc != 0)
- goto fail5;
+ goto fail4;
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
return (0);
-fail5:
- EFSYS_PROBE(fail5);
fail4:
EFSYS_PROBE(fail4);
fail3:
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D18194.id50793.diff (4 KB)
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D18194: sfxge(4): move privilege config to ef10 NIC board config
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