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Index: head/sys/dev/iwn/if_iwn.c
===================================================================
--- head/sys/dev/iwn/if_iwn.c
+++ head/sys/dev/iwn/if_iwn.c
@@ -2120,6 +2120,9 @@
memset(sc->ict, 0, IWN_ICT_SIZE);
sc->ict_cur = 0;
+ bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
+ BUS_DMASYNC_PREWRITE);
+
/* Set physical address of ICT table (4KB aligned). */
DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
@@ -4100,6 +4103,8 @@
/* Read interrupts from ICT (fast) or from registers (slow). */
if (sc->sc_flags & IWN_FLAG_USE_ICT) {
+ bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
+ BUS_DMASYNC_POSTREAD);
tmp = 0;
while (sc->ict[sc->ict_cur] != 0) {
tmp |= sc->ict[sc->ict_cur];
@@ -4635,7 +4640,7 @@
}
bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
- bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
+ bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
BUS_DMASYNC_PREWRITE);
bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
BUS_DMASYNC_PREWRITE);
@@ -4828,7 +4833,7 @@
}
bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
- bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
+ bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
BUS_DMASYNC_PREWRITE);
bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
BUS_DMASYNC_PREWRITE);
@@ -5161,7 +5166,7 @@
bus_dmamap_sync(ring->data_dmat, data->map,
BUS_DMASYNC_PREWRITE);
} else {
- bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
+ bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
BUS_DMASYNC_PREWRITE);
}
bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,

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