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Index: head/cad/Makefile
===================================================================
--- head/cad/Makefile
+++ head/cad/Makefile
@@ -72,6 +72,7 @@
SUBDIR += py-gdspy
SUBDIR += py-lcapy
SUBDIR += py-pycam
+ SUBDIR += py-pyfda
SUBDIR += python-gdsii
SUBDIR += pythoncad
SUBDIR += qcad
Index: head/cad/py-pyfda/Makefile
===================================================================
--- head/cad/py-pyfda/Makefile
+++ head/cad/py-pyfda/Makefile
@@ -0,0 +1,47 @@
+# $FreeBSD$
+
+PORTNAME= pyfda
+PORTVERSION= 0.1
+DISTVERSIONSUFFIX= rc6
+CATEGORIES= cad python devel
+MASTER_SITES= CHEESESHOP
+PKGNAMEPREFIX= ${PYTHON_PKGNAMEPREFIX}
+
+MAINTAINER= yuri@FreeBSD.org
+COMMENT= GUI tool for designing and analysing discrete time filters
+
+LICENSE= MIT
+LICENSE_FILE= ${WRKSRC}/LICENSE
+
+RUN_DEPENDS= ${PYTHON_PKGNAMEPREFIX}docutils>0:textproc/py-docutils@${FLAVOR} \
+ ${PYTHON_PKGNAMEPREFIX}matplotlib>0:math/py-matplotlib@${FLAVOR} \
+ ${PYNUMPY} \
+ ${PYTHON_PKGNAMEPREFIX}scipy>0:science/py-scipy@${FLAVOR}
+
+USES= python:3.4+ pyqt:5
+USE_PYTHON= distutils autoplist noflavors
+USE_PYQT= core_run gui_run widgets_run
+NO_ARCH= yes
+
+post-extract:
+ @${MV} ${WRKSRC}/pyfda/pyfda_log.conf ${WRKSRC}/pyfda/pyfda_log.conf.sample
+ @${MV} ${WRKSRC}/pyfda/pyfda_log_debug.conf ${WRKSRC}/pyfda/pyfda_log_debug.conf.sample
+
+post-patch:
+ @${REINPLACE_CMD} -e " \
+ s|package_data={'pyfda': \['pyfda_log.conf', 'pyfda_log_debug.conf',|package_data={'pyfda': [|; \
+ s|data_files = \[|data_files = [('${PREFIX}/etc', ['pyfda/pyfda_log.conf.sample', 'pyfda/pyfda_log_debug.conf.sample'])|" \
+ ${WRKSRC}/setup.py
+ @${REINPLACE_CMD} -e " \
+ s|logging.config.fileConfig(os.path.join(base_dir, rc.log_config_file))|logging.config.fileConfig(os.path.join('${PREFIX}/etc', rc.log_config_file))|" \
+ ${WRKSRC}/pyfda/pyfdax.py
+ @${REINPLACE_CMD} -e " \
+ s|'pyfda.log'|'/tmp/pyfda.log'|" \
+ ${WRKSRC}/pyfda/*.conf.sample
+
+post-stage:
+ @${REINPLACE_CMD} -E " \
+ s|(.*\.sample)$$|@sample \1|" \
+ ${WRKDIR}/.PLIST.pymodtmp
+
+.include <bsd.port.mk>
Index: head/cad/py-pyfda/distinfo
===================================================================
--- head/cad/py-pyfda/distinfo
+++ head/cad/py-pyfda/distinfo
@@ -0,0 +1,3 @@
+TIMESTAMP = 1505805392
+SHA256 (pyfda-0.1rc6.tar.gz) = 65c09211a860e4ae84715363a4efdf9049c6855e548da17fea5cbbb628925261
+SIZE (pyfda-0.1rc6.tar.gz) = 188694
Index: head/cad/py-pyfda/pkg-descr
===================================================================
--- head/cad/py-pyfda/pkg-descr
+++ head/cad/py-pyfda/pkg-descr
@@ -0,0 +1,9 @@
+pyFDA is a GUI based tool in Python/Qt for analysing and designing discrete
+time filters. The capability for generating Verilog and VHDL code for the
+designed and quantized filters will be added in the next release.
+
+Since the digital filter design is a research area with many unanswered
+questions, this project is also a research project.
+Please expect freezes in case of some parameter values.
+
+WWW: https://github.com/chipmuenk/pyFDA

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