D34956.diff
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	diff --git a/sys/dev/vte/if_vte.c b/sys/dev/vte/if_vte.c
	--- a/sys/dev/vte/if_vte.c
	+++ b/sys/dev/vte/if_vte.c
	@@ -1605,9 +1605,10 @@
	static void
	vte_reset(struct vte_softc *sc)
	{
	- uint16_t mcr;
	+ uint16_t mcr, mdcsc;
	int i;

	+ mdcsc = CSR_READ_2(sc, VTE_MDCSC);
	mcr = CSR_READ_2(sc, VTE_MCR1);
	CSR_WRITE_2(sc, VTE_MCR1, mcr \| MCR1_MAC_RESET);
	for (i = VTE_RESET_TIMEOUT; i > 0; i--) {
	@@ -1625,6 +1626,14 @@
	CSR_WRITE_2(sc, VTE_MACSM, 0x0002);
	CSR_WRITE_2(sc, VTE_MACSM, 0);
	DELAY(5000);
	+
	+ /*
	+ * On some SoCs (like Vortex86DX3) MDC speed control register value
	+ * needs to be restored to original value instead of default one,
	+ * otherwise some PHY registers may fail to be read.
	+ */
	+ if (mdcsc != MDCSC_DEFAULT)
	+ CSR_WRITE_2(sc, VTE_MDCSC, mdcsc);
	}

	static void