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D44522.id136254.diff
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D44522.id136254.diff
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diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c
--- a/sys/amd64/amd64/fpu.c
+++ b/sys/amd64/amd64/fpu.c
@@ -850,7 +850,10 @@
struct pcb *pcb;
uint64_t *xstate_bv, bit;
char *sa;
+ struct savefpu *s;
+ uint32_t mxcsr;
int max_ext_n, i, owned;
+ bool do_mxcsr;
pcb = td->td_pcb;
critical_enter();
@@ -877,14 +880,29 @@
xstate_bv = (uint64_t *)(sa + sizeof(struct savefpu) +
offsetof(struct xstate_hdr, xstate_bv));
max_ext_n = flsl(xsave_mask);
+ do_mxcsr = false;
for (i = 0; i < max_ext_n; i++) {
bit = 1ULL << i;
if ((xsave_mask & bit) == 0 || (*xstate_bv & bit) != 0)
continue;
+ if (i == 0 && (*xstate_bv & (XFEATURE_ENABLED_SSE |
+ XFEATURE_ENABLED_AVX)) != 0) {
+ /*
+ * x87 area was not saved by XSAVEOPT,
+ * but one of XMM or AVX was. Then we need
+ * to preserve MXCSR from overwriting
+ * with the default value.
+ */
+ s = (struct savefpu *)sa;
+ mxcsr = s->sv_env.en_mxcsr;
+ do_mxcsr = true;
+ }
bcopy((char *)fpu_initialstate +
xsave_area_desc[i].offset,
sa + xsave_area_desc[i].offset,
xsave_area_desc[i].size);
+ if (do_mxcsr)
+ s->sv_env.en_mxcsr = mxcsr;
*xstate_bv |= bit;
}
}
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D44522: amd64: handle MXCSR from XSAVEOPT when x87 state was optimized
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