Page MenuHomeFreeBSD
Files F102041591

D33865.id101357.diff
No OneTemporary
Actions

D33865.id101357.diff
View Options

Index: sys/dev/usb/controller/atmegadci.c
===================================================================
--- sys/dev/usb/controller/atmegadci.c
+++ sys/dev/usb/controller/atmegadci.c
@@ -79,8 +79,7 @@
#include <dev/usb/controller/atmegadci.h>
#define ATMEGA_BUS2SC(bus) \
- ((struct atmegadci_softc *)(((uint8_t *)(bus)) - \
- ((uint8_t *)&(((struct atmegadci_softc *)0)->sc_bus))))
+ __containerof(bus, struct atmegadci_softc, sc_bus)
#define ATMEGA_PC2SC(pc) \
ATMEGA_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
Index: sys/dev/usb/controller/avr32dci.c
===================================================================
--- sys/dev/usb/controller/avr32dci.c
+++ sys/dev/usb/controller/avr32dci.c
@@ -78,8 +78,7 @@
#include <dev/usb/controller/avr32dci.h>
#define AVR32_BUS2SC(bus) \
- ((struct avr32dci_softc *)(((uint8_t *)(bus)) - \
- ((uint8_t *)&(((struct avr32dci_softc *)0)->sc_bus))))
+ __containerof(bus, struct avr32dci_softc, sc_bus)
#define AVR32_PC2SC(pc) \
AVR32_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
Index: sys/dev/usb/controller/dwc_otg.c
===================================================================
--- sys/dev/usb/controller/dwc_otg.c
+++ sys/dev/usb/controller/dwc_otg.c
@@ -90,8 +90,7 @@
#include <dev/usb/controller/dwc_otgreg.h>
#define DWC_OTG_BUS2SC(bus) \
- ((struct dwc_otg_softc *)(((uint8_t *)(bus)) - \
- ((uint8_t *)&(((struct dwc_otg_softc *)0)->sc_bus))))
+ __containerof(bus, struct dwc_otg_softc, sc_bus)
#define DWC_OTG_PC2UDEV(pc) \
(USB_DMATAG_TO_XROOT((pc)->tag_parent)->udev)
Index: sys/dev/usb/controller/musb_otg.c
===================================================================
--- sys/dev/usb/controller/musb_otg.c
+++ sys/dev/usb/controller/musb_otg.c
@@ -82,8 +82,7 @@
#define MUSBOTG_INTR_ENDPT 1
#define MUSBOTG_BUS2SC(bus) \
- ((struct musbotg_softc *)(((uint8_t *)(bus)) - \
- USB_P2U(&(((struct musbotg_softc *)0)->sc_bus))))
+ __containerof(bus, struct musbotg_softc, sc_bus)
#define MUSBOTG_PC2SC(pc) \
MUSBOTG_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
Index: sys/dev/usb/controller/uss820dci.c
===================================================================
--- sys/dev/usb/controller/uss820dci.c
+++ sys/dev/usb/controller/uss820dci.c
@@ -77,8 +77,7 @@
#include <dev/usb/controller/uss820dci.h>
#define USS820_DCI_BUS2SC(bus) \
- ((struct uss820dci_softc *)(((uint8_t *)(bus)) - \
- ((uint8_t *)&(((struct uss820dci_softc *)0)->sc_bus))))
+ __containerof(bus, struct uss820dci_softc, sc_bus)
#define USS820_DCI_PC2SC(pc) \
USS820_DCI_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
Index: sys/dev/usb/controller/xhci.c
===================================================================
--- sys/dev/usb/controller/xhci.c
+++ sys/dev/usb/controller/xhci.c
@@ -281,7 +281,7 @@
/* set up command ring control base address */
addr = buf_res.physaddr;
phwr = buf_res.buffer;
- addr += (uintptr_t)&((struct xhci_hw_root *)0)->hwr_commands[0];
+ addr += __offsetof(struct xhci_hw_root, hwr_commands[0]);
DPRINTF("CRCR=0x%016llx\n", (unsigned long long)addr);
@@ -337,7 +337,7 @@
memset(pdctxa, 0, sizeof(*pdctxa));
addr = buf_res.physaddr;
- addr += (uintptr_t)&((struct xhci_dev_ctx_addr *)0)->qwSpBufPtr[0];
+ addr += __offsetof(struct xhci_dev_ctx_addr, qwSpBufPtr[0]);
/* slot 0 points to the table of scratchpad pointers */
pdctxa->qwBaaDevCtxAddr[0] = htole64(addr);
@@ -368,7 +368,7 @@
phwr = buf_res.buffer;
addr = buf_res.physaddr;
- addr += (uintptr_t)&((struct xhci_hw_root *)0)->hwr_events[0];
+ addr += __offsetof(struct xhci_hw_root, hwr_events[0]);
/* reset hardware root structure */
memset(phwr, 0, sizeof(*phwr));
@@ -408,7 +408,7 @@
/* set up command ring control base address */
addr = buf_res.physaddr;
- addr += (uintptr_t)&((struct xhci_hw_root *)0)->hwr_commands[0];
+ addr += __offsetof(struct xhci_hw_root, hwr_commands[0]);
DPRINTF("CRCR=0x%016llx\n", (unsigned long long)addr);
@@ -1100,7 +1100,7 @@
*/
addr = buf_res.physaddr;
- addr += (uintptr_t)&((struct xhci_hw_root *)0)->hwr_events[i];
+ addr += __offsetof(struct xhci_hw_root, hwr_events[i]);
/* try to clear busy bit */
addr |= XHCI_ERDP_LO_BUSY;
@@ -1164,7 +1164,7 @@
usb_pc_cpu_flush(&sc->sc_hw.root_pc);
addr = buf_res.physaddr;
- addr += (uintptr_t)&((struct xhci_hw_root *)0)->hwr_commands[i];
+ addr += __offsetof(struct xhci_hw_root, hwr_commands[i]);
sc->sc_cmd_addr = htole64(addr);

File Metadata

Mime Type
text/plain
Expires
Thu, Nov 7, 9:19 PM (6 h, 42 m)
Storage Engine
blob
Storage Format
Raw Data
Storage Handle
14521006
Default Alt Text
D33865.id101357.diff (4 KB)

Event Timeline