User Details
User Details
- User Since
- Feb 28 2016, 6:03 PM (425 w, 6 d)
Dec 22 2017
Dec 22 2017
jmcneill requested changes to D13591: rgephy: Fix gigabit on some pine64+.
This seems like it is too specific to the Realtek PHY used on Pine64 to apply to all A64 boards.
jmcneill added inline comments to D13591: rgephy: Fix gigabit on some pine64+.
Oct 31 2017
Oct 31 2017
jmcneill added inline comments to D12843: (WIP) Allwinner a83t: add ccung bits.
Sep 30 2017
Sep 30 2017
Disable/enable CSUM_UDP and CSUM_TCP along with CSUM_IP
Fix if_awg tx dma status reg offsets.
Well spotted, thanks! (how did this ever work?)
May 30 2017
May 30 2017
May 7 2017
May 7 2017
Apr 19 2017
Apr 19 2017
jmcneill added a comment to D10383: Add support for the Allwinner H2+ SoC.
Feb 25 2017
Feb 25 2017
jmcneill added inline comments to D9517: Add clkng driver for Allwinner SoC.
Feb 18 2017
Feb 18 2017
jmcneill added inline comments to D9517: Add clkng driver for Allwinner SoC.
Jan 31 2017
Jan 31 2017
Add missing ephy bus gates and resets.
Jan 22 2017
Jan 22 2017
Dec 31 2016
Dec 31 2016
jmcneill committed rS310972: Fix a typo in the third address of the reg property for the usbphy node..
Fix a typo in the third address of the reg property for the usbphy node.
Dec 30 2016
Dec 30 2016
Add missing reg property to usbphy node.
Dec 29 2016
Dec 29 2016
Add support for audio on I2S based DesignWare HDMI controllers.
The JZ4780 I2S can feed either the internal audio codec or the HDMI
jmcneill retitled D8960: jz4780 AIC allow selecting internal/external codec at runtime from to jz4780 AIC allow selecting internal/external codec at runtime.
Dec 28 2016
Dec 28 2016
jmcneill added inline comments to D8956: Do not use read-modify-write on MSC control register..
Dec 20 2016
Dec 20 2016
Add support for Ingenic JZ4780 LCD controller and enable framebuffer
Choose the closes matching divider instead of one that results in a
jmcneill committed rS310306: Split the DesignWare HDMI-specific code from imx6_hdmi.c into a separate.
Split the DesignWare HDMI-specific code from imx6_hdmi.c into a separate
Dec 19 2016
Dec 19 2016
jmcneill updated the diff for D8826: Split dwc_hdmi core code out from imx6_hdmi.
- Call dwc_hdmi_init from imx_hdmi_attach
- Initialize sc_get_i2c_dev in imx_hdmi_attach
Dec 17 2016
Dec 17 2016
jmcneill updated the diff for D8827: jz4780 LCD controller driver.
Cleanup on error path during attach.
jmcneill updated the diff for D8826: Split dwc_hdmi core code out from imx6_hdmi.
Change module name from hdmi to dwc_hdmi_fdt.
jmcneill added a comment to D8807: DMA abstaction layer aka xDMA.
Thinking about this some more. For Allwinner (ARM) we have a private sunxi_dma_if that is used. The config structure has some additional fields:
jmcneill retitled D8826: Split dwc_hdmi core code out from imx6_hdmi from to Split dwc_hdmi core code out from imx6_hdmi.
Dec 16 2016
Dec 16 2016
jmcneill added inline comments to D8808: jz4780 AIC audio driver.
jmcneill added inline comments to D8807: DMA abstaction layer aka xDMA.
jmcneill added inline comments to D8821: aw_clk honor CLK_SET_DRYRUN.
Add support for Ingenic JZ4780 SMBus controller.
Dec 14 2016
Dec 14 2016
jmcneill updated the diff for D8793: jz4780: add driver for SMB controller.
- Remove unused parameters in jzsmb_reset_locked
- Replace timeval usage with timespec
jmcneill added inline comments to D8793: jz4780: add driver for SMB controller.
jmcneill retitled D8793: jz4780: add driver for SMB controller from to jz4780: add driver for SMB controller.
jmcneill retitled D8784: jz4780: fix clk_gen divider calculation and rounding from to jz4780: fix clk_gen divider calculation and rounding.
Dec 12 2016
Dec 12 2016
jmcneill accepted D8765: Fix typo.
Nov 20 2016
Nov 20 2016
Build and install nanopi-neo.dts and orangepi-plus-2e.dts
Add dts for Xunlong Orange Pi Plus 2E.
Add dts for FriendlyARM NanoPi NEO.
Add dtsi for FreeBSD-specific Allwinner H3 nodes.
Nov 19 2016
Nov 19 2016
On H3, initialize alarm and shutdown trip points and do temperature
Nov 15 2016
Nov 15 2016
jmcneill committed rS308705: On command error, reset only DMA and FIFO engines instead of the entire.
On command error, reset only DMA and FIFO engines instead of the entire
jmcneill committed rS308704: Allow the MMC frequency to be set up to 52MHz for MMC high speed timings..
Allow the MMC frequency to be set up to 52MHz for MMC high speed timings.
Nov 3 2016
Nov 3 2016
Add support for Allwinner H3 audio codec.
jmcneill added inline comments to D8425: Allwinner H3 audio codec support.
Nov 2 2016
Nov 2 2016
jmcneill committed rS308236: Add support for the integrated DMA controller found in the Allwinner A31,.
Add support for the integrated DMA controller found in the Allwinner A31,
Register the device's xref handle at attach time.
Add support for H3 PLL2 (PLL_Audio).
jmcneill committed rS308233: The DTS may report fewer than 4 parents for a module clock. Avoid setting.
The DTS may report fewer than 4 parents for a module clock. Avoid setting
Oct 30 2016
Oct 30 2016
jmcneill committed rS308105: Fix H3 temperature reporting. The formula in for V1.0 of the H3 datasheet.
Fix H3 temperature reporting. The formula in for V1.0 of the H3 datasheet
Oct 24 2016
Oct 24 2016
Enable driver for SY8106A Buck Regulator.
jmcneill committed rS307888: Defer cpufreq updates from intr handler to the taskqueue_thread queue..
Defer cpufreq updates from intr handler to the taskqueue_thread queue.
Oct 23 2016
Oct 23 2016
jmcneill committed rS307824: Throttle CPU frequency when hot temperature threshold has been reached to.
Throttle CPU frequency when hot temperature threshold has been reached to
Oct 17 2016
Oct 17 2016
jmcneill added inline comments to D8263: Start u-boot framework.
Oct 16 2016
Oct 16 2016
jmcneill committed rS307393: aw_ccu on H3 needs access to PRCM space. The r_pio controller works now..
aw_ccu on H3 needs access to PRCM space. The r_pio controller works now.
Oct 15 2016
Oct 15 2016
Add driver for GPIO controlled regulator.
Match "allwinner,sun8i-h3-apb0-gates-clk" compatible string.
jmcneill updated the diff for D8257: GPIO controlled regulator driver.
Add ext_resources dependency
Provide a complete A23 PLL1 factor table, from 60MHz to 1872MHz.
Oct 9 2016
Oct 9 2016
MFC r306658: Clear GT_CTRL_ENABLE to stop the timer.
Oct 3 2016
Oct 3 2016
Clear GT_CTRL_ENABLE to stop the timer.
Sep 28 2016
Sep 28 2016
Sep 13 2016
Sep 13 2016
jmcneill added inline comments to D7876: Add Security System/Crypto (PRNG) driver for Allwinner A10/A20 SoC.
Sep 7 2016
Sep 7 2016
Add support for Allwinner A83T CPU frequency scaling.
Attach later so axp81x attaches after aw_nmi.
Sep 6 2016
Sep 6 2016
Add generic device-tree cpufreq driver.
Add generic device-tree cpufreq driver.
Add "pci" as a dependency to ichss.
Add generic device-tree cpufreq driver.
jmcneill closed D7741: Generic DT cpufreq driver by committing rS305498: Add generic device-tree cpufreq driver..
Sep 5 2016
Sep 5 2016
jmcneill committed rS305419: Add sy8106a to Allwinner kernel. This regulator is used to control VDD_CPUX.
Add sy8106a to Allwinner kernel. This regulator is used to control VDD_CPUX
Add driver for Silergy Corp. SY8106A buck regulator.
Add support for Allwinner H3 PLL_CPUX.
jmcneill committed rS305416: Add support for the Allwinner H3 Thermal Sensor Controller. The H3 embeds.
Add support for the Allwinner H3 Thermal Sensor Controller. The H3 embeds
Sep 4 2016
Sep 4 2016
A64 thermal sensor IRQ is GIC_SPI 31, not 41.
Sep 3 2016
Sep 3 2016
jmcneill updated the diff for D7741: Generic DT cpufreq driver.
Add support for arm_big_little_dt bindings and update pc_clock for applicable CPUs at attach and when setting a new frequency.
jmcneill added a comment to D7741: Generic DT cpufreq driver.
I don't think this should be a child of the cpu as the clock adjustment may affect multiple CPUs.
jmcneill updated the diff for D7741: Generic DT cpufreq driver.
Try to restore previous voltage/CPU freq in error paths of cpufreq_dt_set()
Use the root key in the Security ID EFUSE (when valid) to generate a
Add support for Allwinner A64 thermal sensors.
jmcneill committed rS305351: Add cpu-supply xref to cpu@0.
Add cpu-supply xref to cpu@0