Implement atomic_load_acq_16
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Authored by br on Fri, May 17, 10:03 AM.

Details

Reviewers

mhorne
jrtc27

Group Reviewers

riscv

Commits

rG2183004e14a8: riscv: Implement atomic operations

Summary

Implement atomic_load_acq_16(), atomic_store_rel_16(). One of these needed for bhyve pci emulation.
Group 16-bit functions similarly to 32 and 64.

Test Plan

bhyve pass

Diff Detail

Repository

rG FreeBSD src repository

Lint

Lint Not Applicable

Unit

Tests Not Applicable

Event Timeline

br requested review of this revision.Fri, May 17, 10:03 AM

br created this revision.

mhorne added inline comments.Fri, May 17, 2:25 PM

sys/riscv/include/atomic.h
116–144	These two lines should be grouped with the other `#defines` below.
122	?

br added inline comments.Fri, May 17, 10:38 PM

sys/riscv/include/atomic.h
116–144	should we use same grouping as for 32 / 64 ? cmpset/fcmpset seem to go before acquire/release declarations in 32, 64 variants
122	needed by sys/_atomic_subword.h as it checks if macro defined

mhorne accepted this revision.Wed, May 22, 1:51 PM

mhorne added inline comments.

sys/riscv/include/atomic.h
116–144	You are right, it is fine as-is.

This revision is now accepted and ready to land.Wed, May 22, 1:51 PM

Closed by commit rG2183004e14a8: riscv: Implement atomic operations (authored by br). · Explain WhyWed, May 22, 4:07 PM

This revision was automatically updated to reflect the committed changes.

br added a commit: rG2183004e14a8: riscv: Implement atomic operations.

Herald added a subscriber: imp. · View Herald TranscriptWed, May 22, 4:07 PM

Revision Contents
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Path

Size

sys/

riscv/

include/

atomic.h

37 lines

Diff 138929

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sys/riscv/include/atomic.h

Implement atomic_load_acq_16ClosedPublicActions