Change Details

Using the new UMA_ALIGN_CACHE_AND_MASK() facility, which allows to guarantee a minimum of 32 bytes of alignment (5 lower bits are always 0). MFC after: 2 week Sponsored by: The FreeBSD Foundation

Using the new UMA_ALIGN_CACHE_AND_MASK() facility, which allows to simultaneously guarantee a minimum of 32 bytes of alignment (the 5 lower bits are always 0). For the record, to this day, here's a (possibly non-exhaustive) list of synchronization primitives using lower bits to store flags in pointers to thread structures: - lockmgr, rwlock and sx all use the 5 bits directly. - rmlock indirectly relies on sx, so can use the 5 bits. - mtx (non-spin) relies on the 3 lower bits. MFC after: 2 week Sponsored by: The FreeBSD Foundation

Using the new UMA_ALIGN_CACHE_AND_MASK() facility, which allows to simultaneously guarantee a minimum of 32 bytes of alignment (5 lower bits are alwaysthe 5 lower 0)bits are always 0). For the record, to this day, here's a (possibly non-exhaustive) list of synchronization primitives using lower bits to store flags in pointers to thread structures: - lockmgr, rwlock and sx all use the 5 bits directly. - rmlock indirectly relies on sx, so can use the 5 bits. - mtx (non-spin) relies on the 3 lower bits. MFC after: 2 week Sponsored by: The FreeBSD Foundation