Change Details

POWER9 supports two MMU formats: traditional hashed page tables, and Radix page tables, similar to what's presesnt on most other architectures. The PowerISA also specifies a process table -- a table of page table pointers-- which on the POWER9 is only available with the Radix MMU, so we can take advantage of it with the Radix MMU driver. Written by Matt Macy. Currently known broken from my testing, so cannot be committed as-is: * This breaks HPT * ZFS seems to be broken by this as well, for unknown reasons There might be more room for diff reduction, too. The goal of this is to get input on overall design approach, and maybe some insight on unbreaking the broken bits.

POWER9 supports two MMU formats: traditional hashed page tables, and Radix page tables, similar to what's presesnt on most other architectures. The PowerISA also specifies a process table -- a table of page table pointers-- which on the POWER9 is only available with the Radix MMU, so we can take advantage of it with the Radix MMU driver. Written by Matt Macy. There might be more room for diff reduction, too. The goal of this is to get input on overall design approach.

POWER9 supports two MMU formats: traditional hashed page tables, and Radix page tables, similar to what's presesnt on most other architectures. The PowerISA also specifies a process table -- a table of page table pointers-- which on the POWER9 is only available with the Radix MMU, so we can take advantage of it with the Radix MMU driver. Written by Matt Macy. Currently known broken from my testing, so cannot be committed as-is: * This breaks HPT * ZFS seems to be broken by this as well, for unknown reasons There might be more room for diff reduction, too. The goal of this is to get input on overall design approach, and maybe some insight on unbreaking the broken bits.