Change Details

Introduce KASAN support for the riscv architecture. The implementation is similar to arm64. Additionally, this patch refactors the generation of KASAN atomic interceptors in `sys/kern/subr_asan.c`: * **The Problem:** KASAN previously forced the declaration and generation of atomic interceptors for all widths unconditionally. This breaks on architectures like riscv that lack some sub-word atomic implementations. * **The Solution:** Instead of bloating the code with massive `#ifdef` blocks, this patch introduces macros (e.g., `ARCH_SUPPORT_ATOMIC_*_WIDTH`) to declare what the architecture supports, allowing us to conditionally generate these interceptors. The MI code defaults to declaring support for all atomic operations, while MD code can exclude unsupported operations by `#undef` and overriding the specific `ARCH_SUPPORT_ATOMIC_*_WIDTH` macros they lack. LLVM PR: https://github.com/llvm/llvm-project/pull/202288

Introduce KASAN support for the riscv architecture. The implementation is similar to arm64. LLVM PR: https://github.com/llvm/llvm-project/pull/202288

Introduce KASAN support for the riscv architecture. The implementation is similar to arm64. Additionally, this patch refactors the generation of KASAN atomic interceptors in `sys/kern/subr_asan.c`: * **The Problem:** KASAN previously forced the declaration and generation of atomic interceptors for all widths unconditionally. This breaks on architectures like riscv that lack some sub-word atomic implementations. * **The Solution:** Instead of bloating the code with massive `#ifdef` blocks, this patch introduces macros (e.g., `ARCH_SUPPORT_ATOMIC_*_WIDTH`) to declare what the architecture supports, allowing us to conditionally generate these interceptors. The MI code defaults to declaring support for all atomic operations, while MD code can exclude unsupported operations by `#undef` and overriding the specific `ARCH_SUPPORT_ATOMIC_*_WIDTH` macros they lack. LLVM PR: https://github.com/llvm/llvm-project/pull/202288